Semiconductor Buffer Layer Design for Leakage Suppression

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The fluctuation in n+-type buffer layer concentration due to proton implantation conditions and silicon substrate formation methods leads to variations in leakage currents and on-voltage, and the use of accelerators like cyclotrons is hindered by radiation issues, making it difficult to form a broad back-surface n+-type buffer layer of 30 μm in an ordinary semiconductor factory.

Innovation Solution

A semiconductor device with first and second n-type buffer layers, where the first n-type buffer layer is formed by multiple proton implantations at different accelerating voltages with varying peak concentrations, and the second n-type buffer layer is formed by phosphorus implantation with a shallower peak concentration and higher concentration than protons, allowing for reduced oscillation and leakage current suppression without requiring a cyclotron.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a deep n+-type buffer layer is formed by proton implantation using a cyclotron, then oscillation during turn-off is suppressed, but radiation issues prevent use in ordinary semiconductor factories

Engineering Contradiction:
Improvesuppression of oscillation during turn-offVSAvoidmanufacturability in ordinary semiconductor factory
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses a Van de Graaff generator as an intermediary device to deliver protons for buffer layer formation without the radiation issues of cyclotrons. This mediator achieves the necessary proton implantation while being compatible with ordinary semiconductor factory environments, thus resolving the contradiction between reliability improvement and ease of manufacture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the acceleration voltage parameter of the proton implantation device from high-voltage cyclotron levels to lower Van de Graaff generator levels (e.g., 2.5-10 MeV range). This parameter change reduces radiation hazards while still achieving sufficient proton penetration depth to form the required buffer layer, thereby enabling factory compatibility without sacrificing oscillation suppression performance.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If a shallow n+-type buffer layer is formed by diffusion, then manufacturing is simple, but oscillations occur during switching operations

Engineering Contradiction:
Improvesimplicity of diffusion processVSAvoidsuppression of oscillations during switching
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the thermal diffusion process with a mechanical/projection-based proton implantation method using a Van de Graaff generator. This substitution allows precise control of implantation depth and concentration profiles, enabling the formation of deep buffer layers that prevent oscillations while maintaining manufacturing feasibility through programmable ion delivery.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent performs preliminary proton implantation to form the buffer layer before final device assembly and testing. By establishing the deep buffer layer early in the manufacturing process through controlled proton implantation, the device is pre-configured to prevent oscillations during subsequent switching operations, eliminating the need for post-manufacturing adjustments.

Inventive Principle:
Principle #10Preliminary action

3Loss of energy

If the wafer is thinned to reduce on-voltage, then resistance is reduced, but leakage current increases due to depletion layer reaching back surface

Engineering Contradiction:
Improvereduction of on-voltageVSAvoidcontrol of leakage current
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies local quality by creating a buffer layer with specific electrical properties (higher doping concentration) at the back surface region only. This localized modification allows the bulk wafer to remain thin for low on-voltage while the back surface region provides enhanced charge carrier management to prevent leakage, thus resolving the contradiction through spatially differentiated material properties.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent creates a composite structure by combining the thin silicon wafer bulk with a proton-implanted buffer layer at the back surface. This composite approach allows the thin wafer to provide low resistance path for current conduction while the implanted buffer layer provides charge storage capability to prevent depletion-related leakage, achieving both low on-voltage and low leakage current through material composition engineering.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents oscillation during turn-off and recovery by forming a deep diffusion n-type buffer layer with low concentration and high activation rate, reducing leakage currents and enabling n-type buffer layer formation in an ordinary semiconductor factory without the need for a cyclotron.

Implementation Method 1

the first n-type buffer layer is formed by a plurality of implantations of protons at different accelerating voltages

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Implementation Method 2

the second n-type buffer layer is formed by an implantation of a phosphorus

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Implementation Method 3

by performing heat treatment of 1 to 5 hours at 350° C. to 450° C., protons are activated and an n-type region can be formed

Methodology Applied
Scientific EffectThermal Activation: Heat Treatment

Data Source

PatentUS10176994B2Semiconductor device and method of manufacturing the same
Publication Date: 2019.01.08 MITSUBISHI ELECTRIC CORP
  • US10176994B2 patent drawing
  • US10176994B2 patent drawing
  • US10176994B2 patent drawing

AI summary

A p-type base layer (2) is formed on a surface of an n-type silicon substrate (1). First and second n+-type buffer layers (8,9) 9 are formed on a back surface of the n-type silicon substrate (1). The first n+-type buffer layer (8) is formed by a plurality of implantations of protons at different accelerating voltages and has a plurality of peak concentrations with different depths from the back surface of the n-type silicon substrate (1). The second n+-type buffer layer (9) is formed by an implantation of a phosphorus. A position of a peak concentration of the phosphorus is shallower from the back surface of the n-type silicon substrate (1) than positions of peak concentrations of the protons. The peak concentration of the phosphorus is higher than the peak concentrations of the protons. A concentration of the protons is higher than a concentration of the phosphorus at the positions of the peak concentrations of the protons.