Semiconductor Buffer Region Lifetime Killer Placement
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Solution Overview
Problem
Conventional semiconductor devices with field stop layers experience increased tail current and reverse recovery loss due to prolonged carrier lifetime on the rear surface side, leading to inefficiencies during reverse recovery operations.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with a buffer region having multiple impurity concentration peaks and a lifetime killer, such as helium, strategically positioned to shorten carrier lifetime and reduce tail current, while maintaining effective field stop functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If n-type impurities are implanted to the field stop layer and thermal treatment is applied, then carrier lifetime recovers and defects are terminated, but tail current increases and reverse recovery loss increases
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentrations and types. The buffer region has higher impurity concentration than the drift region, and the lifetime killer is selectively positioned in the buffer region. This allows the front surface side to have recovered carrier lifetime while the rear surface side has shortened carrier lifetime, resolving the contradiction between reliability and energy loss.
Solution Approach 2:
The patent resolves the contradiction by introducing a depth dimension to carrier lifetime control. Instead of uniform lifetime management, the lifetime killer is positioned at a specific depth in the buffer region, creating a gradient where carrier lifetime varies with depth. This dimensional approach allows simultaneous optimization of both reliability (front surface) and energy efficiency (rear surface).
2Reliability
If carrier lifetime on the rear surface side becomes too long, then defect termination is effective, but tail current increases during reverse recovery operation
Solution Approach 1:
The patent extracts the harmful effect of long carrier lifetime from the entire semiconductor structure by selectively positioning the lifetime killer only in the buffer region near the rear surface. This allows the drift region and front surface to maintain long carrier lifetime for effective defect termination, while the buffer region has shortened lifetime to suppress tail current.
Solution Approach 2:
The patent applies local quality by creating spatially differentiated carrier lifetime characteristics. The lifetime killer concentration varies with depth, being highest in the buffer region and decreasing toward the drift region. This local modification suppresses tail current generation at the rear surface while preserving the beneficial long lifetime effects in the front regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively suppresses tail current and reverse recovery loss by strategically placing the lifetime killer, enhancing operational efficiency and reducing oscillations during reverse recovery.
Implementation Method 1
a lifetime killer that shortens a carrier lifetime may be formed
Implementation Method 2
If n-type impurities such as protons are implanted to the field stop layer, and the semiconductor substrate is subjected to thermal treatment, the impurities such as protons terminate defects and the like in the semiconductor substrate, and the carrier lifetime recovers
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.