Semiconductor Package Bump-to-PCB Pattern Integration

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Solution Overview

Problem

The existing semiconductor package manufacturing process is costly due to the need for separate lands and PCB patterns around bumps, which increases area consumption and manufacturing costs.

Innovation Solution

The use of PCB patterns as both lands and extension paths for bumps, allowing multiple bumps to be bonded to a single pattern, eliminating the need for separate lands and reducing area consumption, while improving mechanical and electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate lands are formed on the package substrate for receiving bumps, then the mechanical and electrical characteristics are improved, but the manufacturing cost increases and area consumption increases

Engineering Contradiction:

Improvemechanical and electrical characteristicsVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the functions of separate lands and PCB patterns by allowing PCB patterns to serve dual purposes: as electrical connection patterns and as landing areas for bumps. This eliminates the need for distinct separate lands, reducing manufacturing complexity and cost while maintaining mechanical and electrical performance.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The PCB patterns are designed to perform multiple functions simultaneously: providing electrical connections for data communication and power supply, and serving as mechanical support structures (lands) for bump attachment. This multi-functionality reduces the overall number of components and manufacturing steps required.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If separate lands are formed on the package substrate for receiving bumps, then the mechanical and electrical characteristics are improved, but the area consumption increases

Engineering Contradiction:

Improvemechanical and electrical characteristicsVSAvoidarea consumption

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the functions of separate lands and PCB patterns into a unified structure where PCB patterns serve as both electrical connection pathways and mechanical bump-receiving surfaces. This integration eliminates the need for additional separate land areas, thereby reducing overall area consumption while maintaining structural integrity and electrical performance.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The PCB patterns are designed to perform multiple functions simultaneously: providing electrical connections and serving as mechanical support structures (lands) for bump attachment. This multi-functionality reduces the overall number of components and manufacturing steps required.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If PCB patterns are formed around the lands, then the electrical connection is improved, but the manufacturing cost increases

Engineering Contradiction:

Improveelectrical connectionVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

4Area of stationary object

If multiple bumps are bonded to one PCB pattern, then the area consumption is reduced, but the stress distribution may be affected

Engineering Contradiction:

Improvearea consumptionVSAvoidstress distribution

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The patent combines multiple bumps onto a single PCB pattern, allowing several bump connections to share one pattern structure. This reduces the total area required on the package substrate while the pattern design ensures adequate stress distribution across the shared connection point.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8823172B2Semiconductor package and method for fabricating the same

Publication Date: 2014.09.02 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.