Semiconductor Device Capacitive Voltage Boosting for NAND Flash
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing use of high breakdown voltage transistors in NAND flash memory for data writing has led to an expansion of the core circuit area, making it difficult to reduce chip size.
Innovation Solution
A semiconductor device incorporating a control wiring, transistors, and a capacitor that boosts a voltage using capacitive coupling to enhance the operation of word line switches, thereby reducing the circuit size and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high breakdown voltage transistors are used for data writing in highly stacked NAND flash memory, then data writing capability is improved, but core circuit area increases
Solution Approach 1:
The patent divides the core circuit into multiple functional blocks (word line switch control circuit, control line control circuit, voltage generation circuit) and distributes them across different stacking layers. This segmentation allows each block to be optimized independently and reduces the concentrated area requirement in any single location.
Solution Approach 2:
The patent transitions from a planar circuit layout to a three-dimensional stacked architecture where circuits are arranged vertically across multiple layers. This dimensional change enables better space utilization and reduces the footprint area while maintaining circuit functionality through vertical interconnections.
2Stability of the object's composition
If the area of core circuits including word line switch transistors and control circuits is increased to maintain functionality, then operational stability is improved, but chip size reduction becomes difficult
Solution Approach 1:
The patent implements nested circuit structures where control circuits are embedded within or adjacent to the transistors they control. For example, control lines are routed through trenches alongside word line switch transistors, and voltage generation circuits are integrated within the same stacking structure, maximizing space efficiency while maintaining stable operations.
Solution Approach 2:
The patent employs dynamic voltage control mechanisms where voltages are adjusted based on operational requirements. Word line switch transistors and control circuits use dynamically generated voltages (Vsw, Vcg) that adapt to different operating conditions, enabling stable performance with optimized circuit dimensions rather than fixed oversized circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for efficient voltage boosting with reduced power consumption and simplified circuit configuration, enabling smaller chip designs while maintaining operational stability and speed.
Implementation Method 1
a capacitor configured to boost, by capacitive coupling, a second voltage output from the fourth terminal in a state in which the first transistor and the second transistor are turned on to a third voltage higher than the second voltage
Data Source
AI summary
A semiconductor device comprises a control wiring connected to a gate of a first transistor, a second transistor including a first terminal and a second terminal, and a first gate having the control wiring, wherein the first terminal has a first voltage input thereto, wherein the first voltage is provided to turn on the first transistor, a third transistor including a third terminal and a fourth terminal, and a second gate, wherein the third terminal is connected to the second terminal, the fourth terminal controls a voltage of the control wiring, a fourth transistor including a fifth terminal and a sixth terminal, and a third gate, wherein the fourth transistor is turned on by a second control signal, and a capacitor configured to boost, by capacitive coupling, a second voltage output from the fourth terminal in a state in which the first transistor and the second transistor are turned on.