Semiconductor Device Using Capacitor Coupling for Negative Potential Generation

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Solution Overview

Problem

Existing semiconductor devices face challenges in generating high-accuracy negative potentials and comparing them directly, while also aiming to reduce power consumption and device size, with current technologies relying on negative voltage sources that are not always stable or efficient.

Innovation Solution

A semiconductor device configuration utilizing oxide semiconductors and specific transistor structures, including a comparator circuit that converts negative potentials into positive potentials using capacitors, allowing for high-accuracy comparison without a negative power source, and incorporating a voltage generation system that can operate with a single power source.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a negative voltage source is used to generate negative potentials, then negative potentials can be generated, but the generation accuracy is insufficient and stability is poor

Engineering Contradiction:
Improvenegative potential generation accuracyVSAvoidnegative potential stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent inverts the conventional approach by not directly generating negative potentials with a negative voltage source, but instead generating positive potentials with a positive voltage source and then inverting them through capacitor coupling to obtain the required negative potentials. This inversion method achieves both high accuracy and stability.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent introduces capacitors as intermediary elements between the positive voltage source and the circuit nodes requiring negative potentials. These capacitors enable the conversion from positive to negative potentials while maintaining signal integrity and achieving precise potential control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a negative power source is provided to enable negative potential generation, then negative potentials can be generated, but the device complexity increases and power consumption increases

Engineering Contradiction:
Improvenegative potential generation capabilityVSAvoidpower source configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the positive voltage source multi-functional by enabling it to serve both as a direct power source for positive potential requirements and as an indirect source for negative potentials through capacitor coupling. This eliminates the need for a separate negative voltage source.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the negative potential generation function from the power source configuration and implements it through passive capacitor coupling instead, removing the need for a dedicated negative power source and simplifying the overall device architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If conventional transistor structures are used, then the device can be manufactured with standard processes, but the leakage current in off state is high leading to high power consumption

Engineering Contradiction:
Improvemanufacturing process compatibilityVSAvoidleakage current power consumption
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent employs a composite transistor structure combining oxide semiconductor and silicon semiconductor materials. The oxide semiconductor layer provides extremely low leakage current characteristics while the silicon layer ensures compatibility with standard manufacturing processes, achieving both low power consumption and ease of manufacture.

Inventive Principle:
Principle #40Composite materials

4Ease of operation

If direct comparison of negative potentials is attempted, then the comparison function can be implemented, but the comparison accuracy is insufficient

Engineering Contradiction:
Improvenegative potential comparison functionVSAvoidnegative potential comparison accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent inverts the comparison approach by comparing the inverted (positive) versions of the negative potentials instead of comparing the negative potentials directly. This inversion through capacitors enables accurate comparison while maintaining the functional capability to compare negative potential levels.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables stable potential holding, high-accuracy negative potential generation, direct comparison of negative potentials, and reduced power consumption, while downsizing the semiconductor device and allowing it to operate with a single power source.

Implementation Method 1

A gate of the first transistor is electrically connected to the first terminal through the first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a transistor including an oxide semiconductor has an extremely small leakage current in an off state

Methodology Applied
Scientific EffectOxide semiconductor property:

Data Source

PatentUS10090022B2Semiconductor device and method for operating the semiconductor device
Publication Date: 2018.10.02 SEMICON ENERGY LAB CO LTD
  • US10090022B2 patent drawing
  • US10090022B2 patent drawing
  • US10090022B2 patent drawing

AI summary

To provide a semiconductor device with a high output voltage. A gate of a first transistor is electrically connected to a first terminal through a first capacitor. A gate of a second transistor is electrically connected to a second terminal through a second capacitor. One of a source and a drain of a third transistor is electrically connected to the gate of the first transistor through a third capacitor. One of a source and a drain of a fourth transistor is electrically connected to the gate of the second transistor through a fourth capacitor. The other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor are electrically connected to a high potential power source. A third terminal is electrically connected to one of a source and a drain of the second transistor.