Semiconductor Carrier Charge-Trapping Layer RF Stability
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Solution Overview
Problem
Existing semiconductor substrates face issues with device/substrate coupling, particularly in RF devices, due to charge carrier interactions and signal degradation, where thick trapping layers fail to improve performance and insulating passivation layers are unstable at high temperatures, leading to recrystallization and conductive plane formation.
Innovation Solution
A semiconductor support with a charge-trapping layer comprising a polycrystalline main layer and intermediate silicon and carbon alloy layers, which are stable at elevated temperatures and allow for a thickness greater than 10 microns, controlling grain size between 100 nm and 1000 nm to enhance RF performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick trapping layer (greater than 5 microns) is used to push deeper into the substrate the zone in which charges are mobile, then device/substrate coupling is reduced and RF performance is improved, but the trapping layer becomes unstable at high temperatures and recrystallizes, forming a conductive plane that degrades performance
Solution Approach 1:
The patent uses a composite structure consisting of a polycrystalline silicon trapping layer combined with an amorphous silicon oxide passivation layer. This composite material approach allows the trapping layer to maintain its charge-trapping functionality while the amorphous passivation layer provides thermal stability and prevents recrystallization at high temperatures, thus resolving the contradiction between thickness-dependent RF performance and thermal stability.
Solution Approach 2:
The patent changes the physical and chemical parameters of the trapping layer by controlling the crystallinity and composition of the polycrystalline silicon, and by combining it with an amorphous silicon oxide layer. This parameter modification allows the trapping layer to achieve both the desired thickness for RF performance and the thermal stability needed to prevent recrystallization.
2Reliability
If the resistivity of the substrate is increased to reduce charge density and improve RF performance, then device/substrate coupling is reduced, but the trapping layer thickness must be increased to compensate, which leads to instability and recrystallization
Solution Approach 1:
By using a composite structure of polycrystalline silicon with amorphous silicon oxide passivation, the patent enables the trapping layer to achieve effective charge trapping at optimized thicknesses without requiring excessive thickness that would lead to thermal instability. The composite structure provides both functionality and stability.
Solution Approach 2:
The patent applies different material properties to different regions: the polycrystalline silicon provides charge-trapping functionality with appropriate electrical properties, while the amorphous silicon oxide passivation layer provides thermal stability and structural support. This local differentiation allows optimization of both RF performance and thermal stability without requiring uniform increases in thickness.
3Stability of the object's composition
If insulating passivation layers are used to stabilize the trapping layer, then thermal stability is improved, but the passivation layers themselves recrystallize at high temperatures, forming conductive planes that degrade RF performance
Solution Approach 1:
The patent uses a composite material system where amorphous silicon oxide serves as the passivation layer. The amorphous structure of silicon oxide provides superior thermal stability compared to crystalline insulators, preventing recrystallization at high temperatures. This composite approach ensures both thermal stability and maintained RF performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a stable and effective charge-trapping layer that prevents recrystallization and improves RF performance by maintaining a high density of accessible traps, even at high thicknesses, while avoiding the limitations of insulating passivation layers.
Implementation Method 1
The grain boundaries between the grains of silicon constitute traps for the charge carriers, these being able to come from the trapping layer itself or from the underlying support.
Implementation Method 2
the intermediate layer or layers 2b, formed from a silicon and carbon alloy or from carbon, have a thermal stability which prevents the recrystallization of the polycrystalline main layer 2a when the support 1 is subjected to high temperature
Implementation Method 3
The charge carriers trapped in the insulator lead to accumulating, under this layer of insulator, in the support, charges with complementary signs forming a conductive plane. In this conductive plane, the mobile charges are liable to interact strongly with the electromagnetic fields generated by the components of the useful layer.
Data Source
AI summary
A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm·cm.