Semiconductor Device Cavity Design for Stress Reduction

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Solution Overview

Problem

Semiconductor devices using epoxy resin as a sealing material experience reduced reliability due to stress on internal components, and discharge issues arise when high voltage is applied to unsealed areas within the device.

Innovation Solution

A semiconductor device design featuring a case with a concave portion above the semiconductor chip and wire, where the sealing resin is not filled in this area, creating a cavity that reduces the resin's volume and stress on internal components, thereby improving product reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the semiconductor chip and wire are not sealed with resin, then discharge occurs when high voltage is applied, but if sealed with hard epoxy resin, stress is applied to internal components reducing reliability

Engineering Contradiction:
Improveproduct reliabilityVSAvoiddischarge
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies different sealing characteristics to different regions: the concave portion containing the semiconductor chip and wire remains unfilled (cavity), while surrounding areas are sealed with resin. This local differentiation protects against discharge in sealed areas while preventing stress on sensitive internal components in the unfilled cavity region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The cavity structure acts as a pre-designed stress buffer zone. By intentionally leaving the concave portion unfilled, the invention creates a cushioning space that absorbs thermal expansion and mechanical stress before they can reach and damage the semiconductor chip and wire, thereby preventing reliability issues in advance.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Object-affected harmful factors

If sealing resin is filled completely, then discharge is prevented, but stress is applied to internal components

Engineering Contradiction:
Improvedischarge preventionVSAvoidstress on internal components
Core Design Contradiction:
Object-affected harmful factorsVSStress or pressure

Solution Approach 1:

The patent implements selective sealing where the concave portion is excluded from resin filling while surrounding regions are sealed. This creates a local quality difference that provides discharge protection in sealed areas while maintaining a stress-free cavity environment for the semiconductor chip and wire.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The sealing space is segmented into two distinct zones: a sealed outer region for discharge protection and an unfilled inner concave portion for stress reduction. This segmentation allows the resin to provide electromagnetic shielding and discharge prevention without applying stress to sensitive internal components.

Inventive Principle:
Principle #1Segmentation

3Stress or pressure

If a cover is provided without resin filling, then stress is reduced, but discharge occurs in unsealed areas

Engineering Contradiction:
Improvestress reductionVSAvoiddischarge in unsealed areas
Core Design Contradiction:
Stress or pressureVSObject-affected harmful factors

Solution Approach 1:

The patent combines a cover structure with selective resin filling to create different protective qualities in different locations. The cover provides mechanical protection and structural support, while resin filling in surrounding areas (but not in the concave portion) provides discharge protection, achieving both stress reduction and discharge prevention simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11037845B2Semiconductor device and manufacturing method thereof
Publication Date: 2021.06.15 MITSUBISHI ELECTRIC CORP
  • US11037845B2 patent drawing
  • US11037845B2 patent drawing
  • US11037845B2 patent drawing

AI summary

A semiconductor device includes: a semiconductor chip; a case storing the semiconductor chip; a wire bonded to the semiconductor chip; a cover fixed inside the case and including a concave portion disposed above the semiconductor chip and the wire; and a sealing resin potted inside the case and sealing the semiconductor chip, the wire and the cover, wherein the sealing resin is not filled in the concave portion so that a cavity is provided.