Semiconductor Device Ceramic Substrate Warpage Reduction

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Solution Overview

Problem

Conventional semiconductor device manufacturing methods using glass epoxy substrates face challenges such as warpage due to heat, leading to reduced yield and increased manufacturing costs, and the need for multiple redistribution layers results in higher device height and complexity.

Innovation Solution

A semiconductor device design featuring a semiconductor chip with a bump electrode, a molding portion, a single redistribution layer, and an outer connection electrode, where the bump electrode is exposed and the redistribution layer is electrically coupled to both the chip and the outer connection electrode, reducing the number of components and device height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a large area glass epoxy substrate is used to increase the quantity of semiconductor chips per substrate, then manufacturing cost is reduced, but the substrate warps due to heat generated during molding, reducing yield and reliability

Engineering Contradiction:
Improvemanufacturing costVSAvoidsubstrate warpage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material parameter of the substrate from glass epoxy to ceramic, which has superior thermal stability and resistance to warping. This material substitution resolves the contradiction by maintaining substrate integrity during high-temperature molding processes, enabling the use of large area substrates without warpage issues while keeping manufacturing costs low through high chip density.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If two redistribution layers are used to connect outer connection electrodes to semiconductor chips, then electrical connection is achieved, but device height increases and manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidnumber of redistribution layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple redistribution layers into a single redistribution layer that directly connects the outer connection electrodes to the semiconductor chips. This consolidation reduces the number of layers from two to one, decreasing device height and manufacturing complexity while maintaining reliable electrical connections through optimized layer design.

Inventive Principle:
Principle #5Merging (Combining)

3Strength

If a glass epoxy substrate of certain thickness is used to support flip-chip mounting, then mechanical strength is sufficient, but the height of the semiconductor device cannot be reduced below approximately 1 mm

Engineering Contradiction:
Improvesubstrate thicknessVSAvoiddevice height
Core Design Contradiction:
StrengthVSLength of moving object

Solution Approach 1:

The patent changes the substrate material from glass epoxy to ceramic, which provides superior mechanical strength and stiffness. This enables the use of thinner substrates that can still support flip-chip mounting, thereby reducing the overall device height below the 1 mm limitation imposed by glass epoxy substrates while maintaining adequate mechanical strength.

Inventive Principle:
Principle #35Parameter changes

4Reliability

If a recess is formed on a ceramics substrate to implant a semiconductor chip, then chip mounting is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvechip mountingVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the recess formation step from the manufacturing process by using a flat ceramics substrate without recesses. The semiconductor chips are mounted directly on the flat surface, eliminating the need for costly recess formation processes while maintaining reliable chip mounting through the inherent properties of the ceramic substrate and optimized mounting structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11018105B2Semiconductor device and method of manufacturing the same
Publication Date: 2021.05.25 CYPRESS SEMICONDUCTOR CORP
  • US11018105B2 patent drawing
  • US11018105B2 patent drawing
  • US11018105B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip, a bump contract, and encapsulating layer, an insulating layer, and a connection terminal.