Semiconductor Channel Structure With Horizontal Substrate Contact

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Solution Overview

Problem

The challenge in semiconductor devices is to stably connect channel layers to a semiconductor substrate while maintaining a reduced size of the channel hole, as smaller channel holes lead to increased process defects and reduced integration density.

Innovation Solution

A semiconductor device with a channel structure that includes a horizontal portion in contact with the substrate and vertical portions extending through gate electrodes, where a dielectric structure covers the horizontal portion and is interposed between the vertical portions and gate electrodes, allowing for stable connection without increasing channel hole size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the channel hole size is reduced to increase integration density, then the degree of integration is improved, but process defects increase and connection stability deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidconnection stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The channel structure transitions from a simple vertical channel to a three-dimensional structure with both horizontal and vertical portions. The horizontal portion extends along the substrate surface while the vertical portion penetrates through the stacked structure, creating a L-shaped or T-shaped configuration that increases contact area without requiring larger channel holes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The channel structure is divided into distinct horizontal and vertical portions that serve different functions. The horizontal portion provides stable substrate connection, while the vertical portion enables penetration through gate electrodes, allowing each segment to optimize for its specific purpose.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the channel hole size is reduced, then integration density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveintegration densityVSAvoidprocess defect rate
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

By adding the horizontal dimension to the channel structure, the design compensates for the reduced vertical channel hole size. The horizontal portion provides additional connection path and area, reducing the reliance on precise vertical alignment and smaller hole dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If a conventional vertical channel structure is used, then the structure is simple, but stable connection to the substrate cannot be achieved with reduced channel hole size

Engineering Contradiction:
Improvechannel structure simplicityVSAvoidconnection stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The channel structure incorporates a horizontal portion that extends along the substrate surface in addition to the vertical portion. This dimensional addition provides enhanced substrate contact area and improved mechanical/electrical connection stability without significantly complicating the overall fabrication process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The horizontal portion of the channel structure is formed to establish stable substrate connection before the vertical portion is completed. This preliminary horizontal connection provides a robust foundation that ensures reliable substrate attachment even when the final vertical channel hole size is reduced for higher integration.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9997538B2Semiconductor device including channel structure
Publication Date: 2018.06.12 SAMSUNG ELECTRONICS CO LTD
  • US9997538B2 patent drawing
  • US9997538B2 patent drawing
  • US9997538B2 patent drawing

AI summary

A semiconductor device includes a stacked structure disposed on a semiconductor substrate. The stacked structure includes interlayer insulating layers and gate electrodes, alternately stacked. Separation patterns are disposed to penetrate the stacked structure. A channel structure is disposed between the separation patterns. The channel structure includes a horizontal portion interposed between the stacked structure and the semiconductor substrate while being in contact with the semiconductor substrate and includes vertical portions extending from the horizontal portion in a vertical direction and penetrating the stacked structure. A lower structure is interposed between the horizontal portion and the separation patterns. A dielectric structure is interposed between the vertical portions and the stacked structure and extends between the horizontal portion and the stacked structure.