Semiconductor Device Charge Trap Layer Threshold Adjustment

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Solution Overview

Problem

Semiconductor devices face challenges in maintaining adjusted thresholds, preventing electrical characteristic deterioration, achieving low power consumption, and ensuring high reliability, especially with increasing miniaturization, and the ability to retain data when power is stopped.

Innovation Solution

A semiconductor device manufacturing method involving a charge trap layer with a gate electrode structure, where electrons are trapped by maintaining a higher potential and temperature, adjusting the threshold, and removing the gate electrode to prevent further electron addition, thereby stabilizing the electrical characteristics and data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a transistor includes an oxide semiconductor layer, then leakage current is extremely small when the transistor is off, but threshold voltage control and electrical characteristic stability become difficult

Engineering Contradiction:
Improveleakage current characteristicVSAvoidthreshold voltage control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A charge trap layer is introduced as an intermediary between the gate electrode and the oxide semiconductor layer. This charge trap layer mediates the interaction between the gate and the semiconductor, enabling threshold voltage adjustment through charge trapping while maintaining the low leakage current characteristics of the oxide semiconductor. The charge trap layer acts as a buffer that provides controllable threshold voltage without directly affecting the semiconductor's intrinsic low-leakage properties.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The threshold voltage is controlled by changing the charge state of the charge trap layer through application of specific potentials and temperatures. By applying a potential higher than the electrode potential at temperatures between 125°C and 450°C for 1 second or more, charges are trapped in the charge trap layer, thereby adjusting the threshold voltage. This parameter change approach allows precise control of electrical characteristics while maintaining the oxide semiconductor's low leakage current.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the device is miniaturized to achieve high integration, then device density increases, but electrical characteristic deterioration becomes more significant

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical characteristic stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The charge trap layer serves as a stabilizing intermediary that becomes particularly important in miniaturized devices. As device dimensions decrease, the charge trap layer provides a controlled mechanism for threshold voltage adjustment that compensates for increased variability and deterioration effects. This intermediary structure helps maintain electrical characteristic stability even when devices are scaled down for higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The charge trap layer is prepared in advance with specific trapping characteristics before device operation. By pre-configuring the charge trap layer with appropriate trapping sites and characteristics, the device is prepared to maintain stable electrical characteristics from the outset, preventing deterioration that would otherwise occur with miniaturization. This preliminary preparation ensures that even small devices maintain reliable electrical characteristics.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a charge trap layer is used to adjust threshold voltage, then threshold control is achieved, but the structure becomes more complex

Engineering Contradiction:
Improvethreshold voltage adjustmentVSAvoidgate structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The charge trap layer is merged with the gate insulating layer structure, forming an integrated gate stack. Rather than being a completely separate component, the charge trap layer is combined with the existing gate insulation structure, reducing overall device complexity while still providing threshold voltage adjustment functionality. This merging approach allows threshold control without proportionally increasing structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The charge trap layer performs multiple functions: it adjusts threshold voltage, stabilizes electrical characteristics, and can be integrated into various device configurations. This multi-functionality means that a single structural addition provides multiple benefits, reducing the need for separate components and thereby limiting the increase in overall device complexity while achieving precise threshold control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method provides semiconductor devices with adjusted thresholds, improved electrical characteristics, low power consumption, and high reliability, enabling data retention even when power is stopped, enhancing the performance and longevity of semiconductor devices.

Implementation Method 1

a threshold adjustment step of trapping charges in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the electrode and a temperature higher than or equal to 125° C. and lower than or equal to 450° C. for 1 second or more

Methodology Applied
Scientific EffectCharge trapping: Electrical Accumulator

Data Source

PatentUS9269822B2Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2016.02.23 SEMICON ENERGY LAB CO LTD
  • US9269822B2 patent drawing
  • US9269822B2 patent drawing
  • US9269822B2 patent drawing

AI summary

A method for manufacturing a semiconductor device with adjusted threshold is provided. In a semiconductor device including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is provided, a charge trap layer provided between the first gate electrode and the semiconductor, and a gate insulating layer provided between the second gate electrode and the semiconductor, a threshold is increased by trapping electrons in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the source or drain electrode for 1 second or more while heating. After the threshold adjustment process, the first gate electrode is removed or insulated from other circuits. Alternatively, a resistor may be provided between the first gate electrode and other circuits.