Semiconductor Chip Command Sequence Control via Fuse Signals

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Solution Overview

Problem

Current multi-chip semiconductor packages face challenges in configuration flexibility and complex packaging and manufacturing procedures due to the need to distinguish between specific chip configurations and control the master/slave roles of each chip.

Innovation Solution

A semiconductor apparatus comprising at least two chips with a fuse circuit, an external pad, and a control circuit that determines the command execution sequence based on signals generated through fuse burning and external inputs, allowing for uniform chip configurations during packaging and simplifying manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple memory chips are packaged together with different configurations, then configuration flexibility is improved, but packaging and manufacturing procedures become complex and difficult

Engineering Contradiction:
Improveconfiguration flexibilityVSAvoidpackaging and manufacturing procedures
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent applies homogeneity by making all chips in the multi-chip package have identical configurations, including the same number of word lines, bit lines, and memory cells. This uniformity eliminates the need for complex packaging procedures that would be required to handle chips with different configurations, while still achieving configuration flexibility through the selective activation of banks and chips at the system level.

Inventive Principle:
Principle #33Homogeneity

2Manufacturing precision

If chip configurations are differentiated for specific roles, then control precision over master/slave roles is improved, but device complexity increases

Engineering Contradiction:
Improvecontrol precisionVSAvoidchip configuration differentiation
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies dynamics by enabling the master/slave role assignment to be dynamically determined through control signals rather than being fixed by hardware configuration. The memory controller can flexibly assign master or slave roles to different chips based on operational needs, while all chips maintain identical physical configurations. This dynamic approach reduces device complexity compared to static hardware differentiation.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If uniform chip configurations are used during packaging, then packaging and manufacturing procedures are simplified, but configuration flexibility of individual chips is reduced

Engineering Contradiction:
Improvepackaging and manufacturing proceduresVSAvoidconfiguration flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent applies universality by designing chips with identical configurations that can serve multiple roles (master or slave) depending on control signals. Each chip is universally capable of performing the same functions, but the system can flexibly configure which chips perform which functions during operation. This universal design simplifies packaging while maintaining configuration flexibility at the system level through software or controller management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies packaging and manufacturing by eliminating the need to differentiate between chip configurations and enhances flexibility in utilizing each chip, reducing errors and increasing efficiency in chip utilization.

Implementation Method 1

a fuse circuit, configured to generate a first signal and a second signal through fuse burning

Methodology Applied
Scientific EffectFuse burning:

Data Source

PatentUS20240428832A1Semiconductor apparatus, memory, and electronic device
Publication Date: 2024.12.26 RUILI INTEGRATED CIRCUIT CO LTD
  • US20240428832A1 patent drawing
  • US20240428832A1 patent drawing
  • US20240428832A1 patent drawing

AI summary

A semiconductor apparatus, a memory, and an electronic device are disclosed. At least two chips are included. Each of the chips includes: a fuse circuit, configured to generate a first signal and a second signal through fuse burning, and output the first signal and the second signal; an external pad, configured to receive a third signal input to the chip; and a control circuit, connected to the external pad and the fuse circuit. The control circuit is configured to determine, based on the first signal, the second signal, and the third signal, a sequence of executing a command by the chip in which the control circuit is located in the at least two chips.