Semiconductor Chip Electrical Separation via Conductive Member

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Solution Overview

Problem

In high-density mounting of semiconductor chips and passive components on multilayer wiring boards, achieving electrical separation between the input and output ends of the semiconductor chip is challenging due to reduced size and spacing, leading to resonance issues and potential chip damage.

Innovation Solution

The integration of a passive component with first and second terminals connected to the input and output ends of the semiconductor chip on a multilayer wiring board, where conductive members are positioned closer to these terminals than the distance between them, effectively absorbing AC noise and preventing resonance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the separation between input end and output end of semiconductor chip is reduced to achieve high-density mounting, then mounting density is improved, but electrical separation deteriorates leading to resonance and chip damage

Engineering Contradiction:
Improvemounting densityVSAvoidelectrical separation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A conductive member is introduced as an intermediary element between the input and output ends of the semiconductor chip. This conductive member acts as a mediator to provide electrical separation by suppressing resonance, allowing the chip terminals to be positioned closer together while maintaining reliable electrical isolation. The conductive member absorbs or dissipates electromagnetic interference that would otherwise cause resonance between closely spaced input and output signals.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution moves from two-dimensional planar separation to three-dimensional spatial arrangement by placing the conductive member at a specific position in the vertical dimension (at a distance from the terminals that is less than the terminal-to-terminal distance). This dimensional transition allows electrical separation to be achieved through vertical positioning rather than requiring large horizontal spacing, thereby enabling high-density mounting while maintaining reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the distance between conductive members and terminals is reduced, then space utilization is improved for high-density mounting, but noise interference increases

Engineering Contradiction:
Improvespace utilizationVSAvoidnoise interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The invention optimizes the positional parameter of the conductive member relative to the chip terminals. By setting the distance from the conductive member to the terminals at a specific value (less than the terminal-to-terminal distance), the design achieves optimal balance between space utilization and noise suppression. This parameter optimization allows the conductive member to be positioned close to terminals for compact layout while still effectively managing electromagnetic interference and noise.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration ensures electrical separation between the input and output ends of the semiconductor chip, preventing resonance and chip damage while allowing for high-density mounting and reduced noise interference.

Implementation Method 1

conductive members are positioned closer to these terminals than the distance between them, effectively absorbing AC noise and preventing resonance

Methodology Applied
Scientific EffectAC noise absorption: Absorption (EM radiation)

Data Source

PatentUS9066422B2Electronic component
Publication Date: 2015.06.23 DAI NIPPON PRINTING CO LTD
  • US9066422B2 patent drawing
  • US9066422B2 patent drawing
  • US9066422B2 patent drawing

AI summary

In an electronic component in which a semiconductor chip (semiconductor element) and a passive component are integrated on a multilayer wiring board and the semiconductor chip and the passive component constitute a feedback circuit, an input end and an output end of the semiconductor chip (semiconductor element) are electrically separated from each other. The electronic component includes the multilayer wiring board, the semiconductor chip disposed on the main surface of or inside the multilayer wiring board, and the passive component having a first terminal and a second terminal connected to the input end and the output end of the semiconductor chip respectively, and is configured such that a conductive member constituting the multilayer wiring board is located at a position where a distance from at least one of the first terminal and the second terminal is smaller than a distance between the first terminal and the second terminal.