Stacked Semiconductor Chip Gap Control via Resin Projections
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Solution Overview
Problem
In semiconductor devices with a SiP structure, the challenge lies in maintaining the gap between stacked semiconductor chips to prevent excessive crush and connection failures, especially when the chips warp, leading to potential short circuits and open failures, which are exacerbated by the thinness of the chips and small size of micro-bumps.
Innovation Solution
The implementation of stopper projections and bonding projections on the non-connection regions of the semiconductor chips to maintain the gap between chips, enhance connection strength, and prevent warping, using thermosetting resin for bonding projections that are cured before filling underfill resin, ensuring reliable electrical and mechanical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the gap between semiconductor chips is reduced to achieve miniaturization, then the device size is reduced, but excessive crush of micro-bumps and short circuits occur
Solution Approach 1:
A resin layer is introduced as an intermediary substance between the upper and lower semiconductor chips. This resin layer acts as a spacer that maintains a predetermined gap distance, preventing direct contact and excessive crush of the micro-bumps while still allowing the chips to be closely positioned for miniaturization.
Solution Approach 2:
The resin layer is positioned and cured before the final underfill resin is applied. This preliminary action establishes the gap structure in advance, ensuring that the micro-bumps are protected from excessive crush during subsequent processing steps and assembly operations.
2Reliability
If the semiconductor chips are pressure-bonded to connect micro-bumps, then electrical connection is achieved, but warping occurs leading to open failures
Solution Approach 1:
The resin layer positioned between the chips acts as a counteracting element that balances the warping forces generated during pressure bonding. By providing a compliant yet structurally supportive interface, the resin layer counterweights the differential thermal expansion and mechanical stresses that cause chip warping, preventing open failures in the micro-bump connections.
3Reliability
If the gap between chips is kept to prevent bump crush, then connection reliability is improved, but alignment accuracy becomes more difficult to maintain
Solution Approach 1:
The resin layer is made transparent or translucent, allowing visual observation and alignment verification during the assembly process. This optical property enables operators to accurately align the chips while maintaining the protective gap, as the resin does not obstruct the view of the micro-bumps and connection interfaces.
4Strength
If thermosetting resin is used for bonding projections, then connection strength is enhanced, but curing process complexity increases
Solution Approach 1:
The curing process of the resin layer is combined with the subsequent underfill resin application process. Both thermosetting resins are cured simultaneously in the same processing step, eliminating the need for a separate curing operation and reducing overall process complexity while maintaining the high connection strength provided by the thermosetting bonding projections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively suppresses excessive crush and connection failures by maintaining the gap and enhancing the connection strength between chips, reducing the occurrence of open failures and improving alignment accuracy, thus increasing the reliability and stability of the semiconductor device.
Implementation Method 1
bonding projections locally provided between the first non-connection region of the first surface and the second non-connection region of the second surface, and bonded to the first and second surfaces
Data Source
AI summary
In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.