Individual Semiconductor Chip Molding Resin Process

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Solution Overview

Problem

Existing methods for molding semiconductor devices result in cracks and resin waste due to cutting, and thermal expansion issues lead to mechanical warping and contact defects in stacked IC packages.

Innovation Solution

A method involving individual molding of semiconductor chips using a mold with recesses and a flexible release film, where liquid resin is supplied and molded within each recess, minimizing resin usage and preventing warping by controlling temperature and vacuum conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If plural semiconductor chips are molded as a block using conventional transfer molding, then manufacturing efficiency is improved, but cracks develop at cut surfaces and particles are generated during dicing

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidcut surface quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The invention divides the molding process into individual chip-level operations. Each semiconductor chip is molded separately using a mold with multiple cavities that can form individual resin encapsulations. This segmentation eliminates the need to cut a large block into individual packages, thereby preventing cracks and particle generation at cut surfaces while maintaining manufacturing efficiency through simultaneous molding of multiple chips.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention performs preliminary positioning and alignment of each semiconductor chip within the mold cavities before resin injection. The mold structure includes positioning features that pre-establish the correct location and orientation of each chip, ensuring proper spacing and alignment before the molding process begins. This preliminary action prevents the need for post-molding dicing operations that cause surface defects.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If unnecessary resin is fed between adjacent semiconductor chips during block molding, then complete coverage is achieved, but resin waste increases and device dimensions cannot be minimized

Engineering Contradiction:
Improveresin coverage completenessVSAvoidresin waste
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The invention applies resin coverage locally to each individual semiconductor chip rather than uniformly across a large block. The mold cavities are designed to match the specific dimensions and positions of adjacent chips, allowing resin to be injected only where needed to cover each chip and its immediate bonding wires. This local quality approach ensures complete coverage of each chip while eliminating waste resin in the spaces between chips, enabling miniaturization of the overall device package.

Inventive Principle:
Principle #3Local quality

3Productivity

If stacked IC packages are exposed to high temperature during reflowing, then assembly is completed, but thermal expansion differences cause mechanical warping and contact defects

Engineering Contradiction:
Improveassembly completionVSAvoiddimensional accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The invention modifies the thermal and mechanical parameters of the molding process to compensate for thermal expansion differences. The resin material is selected and formulated to have thermal expansion characteristics that match those of the semiconductor chip and substrate. Additionally, the molding process uses controlled temperature profiles and pressure parameters that minimize differential expansion during reflowing, thereby preventing mechanical warping and contact defects while completing the assembly process.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If mechanical cutting is used to form integral molding after gate curing, then package separation is achieved, but outer dimensional accuracy and appearance become defective

Engineering Contradiction:
Improvepackage separationVSAvoidouter dimensional accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention performs preliminary formation of separation features during the molding process itself. The mold cavities are designed with parting lines and release features that create natural separation planes between adjacent packaged chips. The resin is molded to include built-in separation structures that allow easy package separation without requiring subsequent mechanical cutting. This preliminary action achieves package separation while maintaining outer dimensional accuracy and appearance quality.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents resin cracking, reduces waste, ensures high dimensional accuracy, and minimizes warping, resulting in a thin, small, and high-quality semiconductor device with improved assembly reliability.

Implementation Method 1

the liquid resin for each semiconductor element is molded within each said recess at a prescribed temperature

Methodology Applied
Scientific EffectTemperature control:

Implementation Method 2

a mold part (upper die) having plural recesses (cavities) formed in one surface is pressed onto the supporting member

Methodology Applied
Scientific EffectPressure application: Compression

Data Source

PatentUS8304883B2Semiconductor device having multiple semiconductor elements
Publication Date: 2012.11.06 TEXAS INSTRUMENTS INC
  • US8304883B2 patent drawing
  • US8304883B2 patent drawing
  • US8304883B2 patent drawing

AI summary

The objective of the invention is to provide a method of manufacturing a semiconductor device that allows individual molding of plural semiconductor chips carried on a surface of the substrate. It includes the following process steps: a process step in which plural semiconductor elements 102 are arranged on the surface of substrate 100; a process step in which the inner side of substrate 102 is fixed on lower die 130; a process step in which liquid resin 114 is supplied from nozzle 112 onto each of the semiconductor elements in order to cover at least a portion of each of semiconductor chips 102; a process step in which the upper die having plural cavities 144 formed in one surface is pressed onto the lower die, and liquid resin 114 is molded at a prescribed temperature by means of plural cavities 144; and a process step in which cavities 144 of upper die 140 are detached from the substrate, and plural molding resin portions are formed individually.