Semiconductor Chip Temperature Control Using Parasitic Diode

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Solution Overview

Problem

Conventional semiconductor device testing methods face challenges in accurately and efficiently stabilizing the temperature of semiconductor chips at a predetermined temperature due to the temperature drop caused by probe terminals, leading to prolonged preheating times and potential erroneous testing results, especially at the initial stages of device operation.

Innovation Solution

A method involving the use of probe terminals where the temperature of the semiconductor chip is measured using a parasitic diode's temperature characteristics, and controlled heating is applied to compensate for the temperature drop, ensuring the chip reaches and maintains the target temperature within a short time, thereby allowing accurate electrical characteristic testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If probe terminals are brought into contact with the semiconductor chip to test electrical characteristics, then electrical testing can be performed, but the temperature of the semiconductor chip drops due to heat absorption by the probe terminals

Engineering Contradiction:
Improveaccuracy of electrical characteristic testingVSAvoidtemperature stability of semiconductor chip
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The semiconductor chip is preheated to a temperature higher than the target test temperature before the probe terminals are brought into contact. This preliminary heating action compensates for the anticipated temperature drop when the cooler probe terminals contact the chip, ensuring the chip maintains the correct test temperature throughout the electrical characteristic measurement process

Inventive Principle:
Principle #10Preliminary action

2Temperature

If the semiconductor chip is preheated to compensate for temperature drop, then temperature stability during testing is improved, but the preheating time increases

Engineering Contradiction:
Improvetemperature stability of semiconductor chipVSAvoidpreheating time
Core Design Contradiction:
TemperatureVSLoss of time

Solution Approach 1:

A temperature detection device continuously monitors the temperature of the semiconductor chip during preheating and testing. This feedback mechanism allows the system to detect when the chip reaches the target temperature and automatically end the preheating process, preventing unnecessary extended heating time while ensuring temperature stability is achieved

Inventive Principle:
Principle #23Feedback

3Measurement precision

If preheating time is extended to ensure temperature stability, then testing accuracy is improved, but productivity decreases

Engineering Contradiction:
Improveaccuracy of electrical characteristic measurementVSAvoidtesting throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The temperature detection device provides real-time feedback on chip temperature, allowing the system to precisely determine when preheating is complete. This eliminates excessive preheating time while ensuring the chip reaches the required test temperature, thereby maintaining measurement accuracy while improving testing throughput

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

By preheating the chip to a higher temperature before contact with probe terminals, the system compensates for the temperature drop in advance. This preliminary action reduces the actual preheating time needed after contact, thereby improving productivity without sacrificing measurement precision

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces preheating time and ensures that electrical characteristics are tested at a stable temperature, preventing incorrect determinations of semiconductor chip defects and enabling efficient high-temperature testing.

Implementation Method 1

obtaining a temperature of the semiconductor chip by measuring electrical characteristics of the diode through at least one of the front electrodes and the back surface electrode and by referring to prescribed temperature characteristics of the diode

Methodology Applied
Scientific EffectTemperature characteristics of diode: Diode

Implementation Method 2

heating up the semiconductor chip by applying voltage between one or more of the front surface electrodes and the back surface electrode

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS11333702B2Semiconductor device test method
Publication Date: 2022.05.17 FUJI ELECTRIC CO LTD
  • US11333702B2 patent drawing
  • US11333702B2 patent drawing
  • US11333702B2 patent drawing

AI summary

A method for testing a semiconductor chip that has a pn junction constituting a parasitic diode therein includes: causing probe terminals to be in contact with front surface electrodes of the semiconductor chip; obtaining a temperature of the semiconductor chip by measuring electrical characteristics of the parasitic diode through at least one of the front surface electrodes and a back surface electrode and by referring to prescribed temperature characteristics of the parasitic diode; if the obtained temperature is not within a prescribed tolerance from the predetermined target temperature, heating up the semiconductor chip by applying voltage between one or more of the front surface electrodes and the back surface electrode; and once the obtained temperature increases and reaches the predetermined target temperature within the prescribed tolerance, testing electrical characteristics of the semiconductor chip through the front surface electrodes and the back surface electrode.