Semiconductor Chip Setting Information Storage via Coupling Pads
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Solution Overview
Problem
Semiconductor systems with multiple chips face challenges in optimizing operation settings due to differing characteristics, as they share command and address information and chip select signals, leading to inefficient use of data pad groups and inability to store unique setting information.
Innovation Solution
The semiconductor system includes separate coupling information pads for each chip, allowing them to selectively store and enable setting information based on CA information, enabling or disabling on-die termination functions and optimizing reference voltages for each chip, and using mode register sets to manage data and CA reference voltages independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple semiconductor chips share command and address information and chip select signals, then device complexity is reduced and ease of operation is improved, but the ability to store and apply unique setting information for each chip deteriorates
Solution Approach 1:
The patent divides the setting information storage function into separate segments for each semiconductor chip. Each chip has its own dedicated setting information storage region that can independently store and apply setting information, while still sharing the common command and address bus. This segmentation allows each chip to maintain its own optimized settings without increasing overall system complexity.
Solution Approach 2:
The patent implements local quality by allowing each semiconductor chip to have its own unique setting information stored in its respective storage region. This enables each chip to be customized with specific settings optimized for its individual characteristics, while the overall system maintains a unified command and address structure.
2Ease of manufacture
If all data pad groups are coupled to outside for optimization, then ease of manufacture is improved, but loss of substance increases due to unused pads
Solution Approach 1:
The patent implements dynamic configuration of data pad group couplings based on actual usage requirements. Each semiconductor chip can dynamically select which data pad groups to couple to the outside and which to keep internal, allowing the system to adapt to different operational modes and minimize the number of external connections needed while maintaining manufacturing simplicity.
3Measurement precision
If training operation is performed to optimize CA reference voltage, then measurement precision is improved, but loss of time increases due to extensive training required
Solution Approach 1:
The patent performs preliminary training operations during the manufacturing and initialization phase to optimize CA reference voltage settings for each semiconductor chip. By completing the time-consuming training and optimization processes beforehand, the system establishes optimal settings that can be stored and applied without requiring extensive training during normal operation, thus reducing operational time loss.
Data Source
AI summary
A semiconductor system may include: an external channel including a CA (Command/Address) channel, and first and second data channels; and first and second semiconductor chips, which are coupled in common to the CA channel and coupled to respective different ones of the first and second data channels, and each of which includes a coupling information pad. A first value may be inputted to the coupling information pad of one of the first and second semiconductor chips that is coupled to the first data channel, and a second value may be inputted to the coupling information pad of the other semiconductor chip that is coupled to the second data channel. Each of the first and second semiconductor chips selectively stores setting information using CA information applied to the CA channel and a value inputted to the corresponding coupling information pad.