Light-Emitting Semiconductor Chip Side Contact Design

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Solution Overview

Problem

Conventional light-emitting semiconductor chips have reduced light emission due to connection points on the top and bottom surfaces, which occupy space and obstruct light transmission, limiting the available light-emitting area.

Innovation Solution

The design features a light-emitting semiconductor chip with current distribution structures that are freely accessible on the top surface and integrated into the semiconductor body, eliminating connection points on the top and bottom surfaces, allowing for a larger light-emitting area, and incorporating a light-transmissive substrate for enhanced light transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If connection points are provided on the top and bottom surfaces for electrical contacting, then electrical connection is achieved, but the light-emitting area is reduced

Engineering Contradiction:
Improveelectrical connectionVSAvoidlight-emitting area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent moves the electrical connection interface from the traditional top/bottom surfaces to the side surface of the semiconductor chip. The current distribution structures are arranged to be accessible from the side surface, allowing electrical contacting in a different spatial dimension while preserving the top and bottom surfaces for light emission.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Instead of providing connection points on the top and bottom surfaces as in conventional designs, the patent inverts the approach by making the side surface the primary interface for electrical contacting. This inversion allows the top and bottom surfaces to be fully dedicated to light emission.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If connection points are provided on the top and bottom surfaces, then electrical contacting is enabled, but light transmission is obstructed

Engineering Contradiction:
Improveelectrical contactingVSAvoidlight obstruction
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent relocates the electrical contacting interface to the side surface, separating the electrical connection function from the light emission surfaces. This spatial separation eliminates the obstruction of light transmission by connection points on the top and bottom surfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the electrical connection function from the top and bottom surfaces and relocates it to the side surface. This extraction removes the harmful effect of connection points blocking light transmission while maintaining necessary electrical connectivity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If current distribution structures are integrated into the semiconductor body, then light-emitting area is increased, but manufacturing complexity increases

Engineering Contradiction:
Improvelight-emitting areaVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the current distribution structures with the semiconductor body by forming them as integral parts during the epitaxial growth process. This integration eliminates separate manufacturing steps for adding connection points after chip fabrication, thereby reducing overall manufacturing complexity while achieving full light-emitting area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The current distribution structures are formed preliminarily during the epitaxial growth of the semiconductor body, before the chip is separated and packaged. This preliminary formation integrates the electrical connection structures into the manufacturing flow without requiring additional post-processing steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration increases the light-emitting area to at least 90% of the chip's surface, improving light emission efficiency and allowing for vertical mounting and different emission wavelengths, which can enhance color rendering and brightness.

Implementation Method 1

the active region is supplied with current, which leads to the generation of light, which leaves the light-emitting semiconductor chip at least partially

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Implementation Method 2

the substrate is formed to be light-transmissive. In this case, the substrate is transmissive or transparent, for example, for light generated in the semiconductor chip during operation

Methodology Applied
Scientific EffectLight transmission: Refraction

Data Source

PatentUS10672962B2Light-emitting semiconductor chip, light-emitting component and method for producing a light-emitting component
Publication Date: 2020.06.02 AMS OSRAM INT GMBH
  • US10672962B2 patent drawing
  • US10672962B2 patent drawing
  • US10672962B2 patent drawing

AI summary

A light-emitting semiconductor chip, a light-emitting component and a method for producing a light-emitting component are disclosed. In an embodiment a light-emitting semiconductor chip includes a substrate having a top surface, a bottom surface opposite the top surface and a first side surface extending transversely or perpendicularly to the bottom surface, a semiconductor body arranged on the top surface of the substrate, the semiconductor body comprising an active region configured to generate light and a contacting comprising a first current distribution structure and a second current distribution structure, which is formed to supply current to the active region, wherein the semiconductor chip is free of any connection point on a side of the semiconductor body facing away from the substrate and on the bottom surface of the substrate, and wherein the connection point is a connection point for electrically contacting the first and second current distribution structures.