Semiconductor Chip Test Device With Cushioning Member
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor chip test devices face challenges in maintaining stable test yield due to connection defects and impact damage during performance testing.
Innovation Solution
A semiconductor chip test device with a guide plate, substrate, upper and lower sockets, and a pressurizing member that uses pogo pins and an elastic member to securely position and support the semiconductor chip, preventing connection defects and absorbing impact through a buffer force.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semiconductor chip is elastically supported by a pressurizing unit to maintain test yield, then connection stability is improved, but the chip may be damaged by impact during performance testing
Solution Approach 1:
The patent introduces a cushioning member positioned between the pressurizing unit and the semiconductor chip. This cushioning member absorbs impact forces during performance testing while allowing the pressurizing unit to maintain stable connection through elastic support, thus preventing impact damage without compromising connection stability.
2Manufacturing precision
If the pressurizing unit applies elastic force to fix the chip at a predetermined position, then positioning accuracy is improved, but connection defects may occur during testing
Solution Approach 1:
The patent introduces a cushioning member as an intermediary element between the pressurizing unit and the semiconductor chip. This intermediary absorbs mechanical stresses and impact forces, preventing direct transmission to the chip connections while allowing the pressurizing unit to maintain accurate positioning through elastic force.
3Reliability
If pogo pins are used to exchange electrical signals with the chip, then electrical connection is improved, but the pins may be damaged by impact during performance testing
Solution Approach 1:
The cushioning member positioned above the pogo pins absorbs impact forces before they reach the pins during performance testing. This protective cushioning ensures that the pogo pins maintain reliable electrical connections without suffering damage from impact forces during testing operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device effectively suppresses connection defects and absorbs impact, ensuring stable test yield by maintaining secure chip positioning and providing a buffer against external forces during testing.
Implementation Method 1
an elastic member installed between the cover and the pressurizing plate and providing an elastic force of pressurizing the pressurizing plate downward
Implementation Method 2
absorb an impact which may occur during a performance test of the semiconductor chip, thereby preventing the damage of the device and the semiconductor chip
Data Source
AI summary
A semiconductor chip test device may include: a guide plate having a seating groove formed at the bottom thereof; a substrate coupled to the bottom of the guide plate, and having an upper semiconductor chip mounted on the top surface thereof such that the upper semiconductor chip is positioned in the seating groove; an upper socket having upper pogo pins coupled to the bottom of the guide plate in a state where the upper pogo pins are in contact with bottom patterns of the substrate, and having lower pogo pins formed on the bottom surface thereof, wherein the upper pogo pins protrude upward, and the lower pogo pins protrude downward; and a lower socket having a lower semiconductor chip seated on the top surface thereof, the lower semiconductor chip being in contact with the lower pogo pins.