Semiconductor Chip Singulation via Two-Stage Etching

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Solution Overview

Problem

Conventional laser separation methods for producing semiconductor chips result in mechanical damage, reduced breakage stability, and the risk of short-circuiting due to narrow mesa trenches and flush metallic contact layers, which complicates close assembly of chips.

Innovation Solution

A method involving a two-stage etching process to singulate semiconductor chips, using anisotropic deep reactive ion etching for the first trench and isotropic etching for the second trench, which creates a separation trench that maintains a wider substrate at the chip edge, avoiding mechanical damage and allowing for a safe electrical spacing between adjacent chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If laser separation is used to singulate semiconductor chips, then the wafer can be split into individual chips, but mechanical damage occurs at chip edges and in the resulting melt which reduces breakage stability

Engineering Contradiction:
Improvechip singulationVSAvoidbreakage stability
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The separation process is divided into two distinct stages: first forming trenches through the semiconductor layer, then severing the substrate. This segmentation allows each stage to be optimized independently, avoiding the need for wide mesa trenches while preventing mechanical damage to chip edges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The semiconductor layer is separated from the substrate before the substrate is completely severed. This preliminary action allows the semiconductor layer to be handled and processed independently, preventing mechanical damage that would occur if the substrate were cut through first.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If laser separation is used to singulate semiconductor chips, then the wafer can be split into individual chips, but the metallic contact layers terminate flush with the chip edges creating a risk of short-circuiting in close assembly

Engineering Contradiction:
Improvechip singulationVSAvoidelectrical insulation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The separation process is divided into two distinct stages: first forming trenches through the semiconductor layer, then severing the substrate. This segmentation allows each stage to be optimized independently, avoiding the need for wide mesa trenches while preventing mechanical damage to chip edges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The problem of electrical insulation is solved by transitioning from a two-dimensional surface problem to a three-dimensional solution. By creating deep trenches that extend through the substrate and applying insulating material to the trench walls, electrical insulation is achieved in the vertical dimension, allowing chips to be placed closer together horizontally without risk of short-circuiting.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Strength

If wide mesa trenches are used between adjacent semiconductor chips, then mechanical damage is reduced, but the chip area is reduced and assembly density is lowered

Engineering Contradiction:
Improvebreakage stabilityVSAvoidchip area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

The separation process is divided into two distinct stages: first forming trenches through the semiconductor layer, then severing the substrate. This segmentation allows each stage to be optimized independently, avoiding the need for wide mesa trenches while preventing mechanical damage to chip edges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the chip structure are given different properties: the chip edges are reinforced with insulating material in the trenches, while the chip area is maximized. This local differentiation allows mechanical strength and electrical insulation to be enhanced at critical locations without reducing the overall chip area.

Inventive Principle:
Principle #3Local quality

4Productivity

If conventional laser separation is used, then chip production can proceed, but the process causes mechanical damage and reduces breakage stability of the chips

Engineering Contradiction:
Improvechip productionVSAvoidmechanical damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The mechanical laser separation process is replaced with a chemical etching process. By using plasma or liquid etchants to remove material, the harmful mechanical stresses and melting associated with laser separation are eliminated, preventing mechanical damage to chip edges while maintaining high productivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The separation process transitions from high-energy laser parameters to controlled chemical etching parameters. By changing the fundamental mechanism from thermal/mechanical to chemical, the harmful effects of mechanical damage are eliminated while the separation function is maintained.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the breaking strength of semiconductor chips, reduces the risk of electrical bridging, and prevents mechanical damage typically caused by laser cutting, while maintaining a safe electrical spacing between chips in close assembly.

Implementation Method 1

In a first etching process, anisotropic deep reactive ion etching is used for forming a first trench through the semiconductor layer and through a portion of the substrate wafer

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

In a second etching process, an isotropic etching process is used for forming a second trench, which adjoins the first trench at its bottom and by which the substrate wafer is completely severed

Methodology Applied
Scientific EffectIsotropic etching:

Data Source

PatentUS10903119B2Semiconductor chip, method of producing a semiconductor chip and apparatus having a plurality of semiconductor chips
Publication Date: 2021.01.26 OSRAM OLED
  • US10903119B2 patent drawing
  • US10903119B2 patent drawing
  • US10903119B2 patent drawing

AI summary

A semiconductor chip, a method for producing a semiconductor chip and an apparatus having a plurality of semiconductor chips are disclosed. In an embodiment a chip includes a substrate and a semiconductor layer arranged at the substrate, wherein the substrate includes, at a side facing the semiconductor layer, a top side with a width B1 in a first lateral direction and, at a side opposite to the top side, a bottom side with a width B3 in the first lateral direction, wherein the substrate has a width B2 in the first lateral direction at a half height between the top side and the bottom side, and wherein the following applies to widths B1, B2 and B3: B1−B2<B2−B3, and B1≥B2>B3.