Semiconductor Package Clip Layout for Lower On-Resistance
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Solution Overview
Problem
The increasing demand for lower on-resistance values in semiconductor devices, particularly in the range of 1 mΩ to 2.5 mΩ, has not been adequately addressed by existing package structures, which suffer from longer current paths and the use of less conductive materials like aluminum, leading to higher resistance.
Innovation Solution
The introduction of a copper-based plate-shaped clip to connect source pads and leads, replacing traditional bonding wires, and optimizing the layout to increase joint areas and reduce the use of less conductive materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding wires are used to connect source pads and leads, then the device complexity is reduced, but the on-resistance increases due to longer current paths and less conductive materials
Solution Approach 1:
The patent changes the material parameter from aluminum bonding wires to copper plate-shaped clips, exploiting copper's superior electrical conductivity to reduce on-resistance. This material substitution directly addresses the resistance issue while maintaining connection functionality
Solution Approach 2:
The patent transitions from one-dimensional wire connections to two-dimensional plate-shaped clips with increased joint areas. This dimensional change allows for larger contact surfaces between the source pads and leads, reducing contact resistance and providing alternative current paths
2Reliability
If aluminum bonding wires are used for connections, then manufacturing cost is reduced, but on-resistance increases due to lower electrical conductivity
Solution Approach 1:
The patent changes the material parameter from aluminum to copper, exploiting copper's superior electrical conductivity to reduce on-resistance. This material substitution directly addresses the resistance issue while maintaining connection functionality
Solution Approach 2:
The patent replaces the wire bonding process with a clip attachment mechanism. The plate-shaped clips are mechanically attached to the source pads and leads, substituting the traditional wire bonding mechanical process with a simpler clip-on approach that enables copper material usage
3Reliability
If joint areas between bonding wires and leads are minimized, then device footprint is reduced, but on-resistance increases due to smaller contact areas
Solution Approach 1:
The patent transitions from one-dimensional wire connections to two-dimensional plate-shaped clips with increased joint areas. This dimensional change allows for larger contact surfaces between the source pads and leads, reducing contact resistance and providing alternative current paths
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces on-resistance by utilizing the higher conductivity of copper and increasing joint areas, thereby meeting the demand for lower on-resistance values.
Implementation Method 1
The source pad is electrically connected to a first lead via a plate-shaped member made of a material which is copper as a main component
Data Source
AI summary
The on-resistance of a semiconductor device is reduced. A package structure composing the semiconductor device includes a die pad, a plurality of leads, a first semiconductor chip having a power transistor and mounted on the die pad, and a second semiconductor chip including a control circuit for controlling the power transistor and mounted on the first semiconductor chip. Here, a source pad of the first semiconductor chip is electrically connected to a first lead and a seventh lead of the plurality of leads via a clip made of a material which is copper as a main component, and the width (and cross-sectional area) of the clip is larger than the width (and diameter) of a wire in plan view.