Non-Reactive Interface for Semiconductor Device Contacts

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Solution Overview

Problem

Conventional source/drain contacts in MOS transistor devices form Schottky barriers that limit electron conduction and increase contact resistance, which becomes a significant portion of the total device resistance as technology scales, hindering further performance improvements.

Innovation Solution

A non-reactive interface is created between the conductive contacts and the doped silicon surface using non-reactive conductive materials or thin insulating/semiconducting layers, preventing the formation of silicide regions and reducing the Schottky barrier height, thereby reducing contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional conductive material is deposited on doped silicon substrate to form contacts, then a silicide region is produced, but a Schottky barrier is formed that limits electron conduction and increases contact resistance

Engineering Contradiction:
Improvecontact resistanceVSAvoidSchottky barrier
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A thin insulating layer (such as silicon oxide or silicon nitride) is introduced as an intermediary between the conductive contact material and the doped silicon substrate. This intermediate layer prevents direct reaction between the metal and silicon, avoiding silicide formation and the associated Schottky barrier, while still allowing electrical conduction through the thin insulating barrier.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thickness of the insulating layer is precisely controlled at the nanometer scale to optimize the balance between preventing silicide formation and maintaining low contact resistance. By adjusting this critical parameter, the contact resistance is reduced while avoiding the harmful Schottky barrier effect.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If technology scaling continues to reduce device dimensions, then device performance should improve, but contact resistance becomes a significant portion of total device resistance, hindering further performance improvements

Engineering Contradiction:
Improvedevice performanceVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The thin insulating layer serves as a mediator that enables continued technology scaling by preventing the formation of high-resistance Schottky barriers at contact interfaces. This allows device dimensions to be reduced while maintaining low contact resistance, ensuring that contact resistance does not become the limiting factor in device performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for reduced contact resistance, enabling MOS devices to operate at lower power and current, expanding circuit design options and potential applications beyond central processing units, and enhancing battery life.

Implementation Method 1

Tunneling through the thin insulating or semiconducting layer allows for a connection while maintaining a non-reactive interface with the contact surface

Methodology Applied
Scientific EffectTunneling:

Data Source

PatentUS9166004B2Semiconductor device contacts
Publication Date: 2015.10.20 INTEL CORP
  • US9166004B2 patent drawing
  • US9166004B2 patent drawing
  • US9166004B2 patent drawing

AI summary

Techniques are disclosed for forming contacts in silicon semiconductor devices. In some embodiments, a transition layer forms a non-reactive interface with the silicon semiconductor contact surface. In some such cases, a conductive material provides the contacts and the material forming a non-reactive interface with the silicon surface. In other cases, a thin semiconducting or insulating layer provides the non-reactive interface with the silicon surface and is coupled to conductive material of the contacts. The techniques can be embodied, for instance, in planar or non-planar (e.g., double-gate and tri-gate FinFETs) transistor devices.