Semiconductor Contact Isolation via Oxide Barrier
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Solution Overview
Problem
Conventional semiconductor device fabrication methods often result in short circuits due to the infiltration of wet etchants into dummy and peripheral regions during the formation of electrically conductive contact openings in the array region, leading to undesired filling of these regions with conductive material.
Innovation Solution
The use of distinct electrically insulative materials and oxidation of exposed surfaces to create a boundary that prevents etchant penetration, allowing for the formation of electrically conductive contacts in the array region without short circuits in the dummy and peripheral regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wet etchants are used to form openings in the array region, then electrically conductive contact openings can be formed, but the etchants penetrate into the dummy region and peripheral region causing short circuits
Solution Approach 1:
The semiconductor device is divided into distinct regions (array region, dummy region, peripheral region) with different insulative materials in each. The dummy region contains a first insulative material that is resistant to the wet etchant used in the array region, while the array region contains a second insulative material that is etched away. This segmentation allows selective etching without cross-contamination between regions.
Solution Approach 2:
The first insulative material in the dummy region acts as an intermediary barrier that prevents the wet etchant from penetrating into the peripheral region. This intermediary material is specifically chosen to be resistant to the etchant while allowing the etching process to proceed in the array region, thus mediating between the etching requirement and the protection requirement.
2Manufacturing precision
If photoresist material is used during patterning, then contact openings can be defined, but the etchant infiltrates under the photoresist and removes insulative materials in dummy and peripheral regions
Solution Approach 1:
The first insulative material is预先 placed in the dummy region before the patterning and etching processes. This preliminary protective layer prevents the etchant from infiltrating under the photoresist and attacking the insulative materials in the dummy and peripheral regions, counteracting the harmful infiltration effect before it can occur.
Solution Approach 2:
The first insulative material serves as a cushioning layer that absorbs and blocks the harmful effects of etchant infiltration. By placing this protective material beforehand in the dummy region, the patent creates a buffer zone that prevents the etchant from reaching and damaging the insulative materials in the peripheral region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents short circuits by ensuring that electrically conductive contacts are isolated from the dummy and peripheral regions, maintaining the integrity of the semiconductor device during operation.
Implementation Method 1
oxidation of exposed surfaces to create a boundary that prevents etchant penetration
Data Source
AI summary
A semiconductor device comprises an array region, a dummy region, pillars of an electrically insulative material in the array region and the dummy region. The semiconductor device further comprises electrically conductive contacts between adjacent pillars of the electrically insulative material in the array region, another electrically insulative material between adjacent pillars of the electrically insulative material in the dummy region, an electrically conductive material over the conductive contacts in the array region and over the electrically insulative material in the dummy region, and an oxide between the electrically conductive material in the dummy region and the electrically insulative material in the dummy region. Related semiconductor devices, systems, and methods are also disclosed.