Semiconductor Contact Plug with Expanded Conductive Layer
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Solution Overview
Problem
The existing methods for forming conductive layers in three-dimensional transistors using silicon pillars result in a small contact margin for contact plugs due to the limited thickness of the conductive layer, which is constrained by the thickness of the silicon pillars, leading to potential operational issues in highly integrated semiconductor devices.
Innovation Solution
A manufacturing method that forms a through-hole with a larger upper-side opening than the upper surface of the silicon pillar, allowing for a conductive material to be buried, thereby increasing the area of the contact surface between the conductive material and the contact plug, ensuring a larger contact margin for the contact plug.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the conductive layer is formed by embedding conductive material into the through-hole formed by removing the silicon-nitride film mask, then the contact resistance between the conductive layer and the silicon pillars is minimized, but the area of the upper surface of the conductive layer becomes very small and the contact margin of the contact plug on the conductive layer becomes small
Solution Approach 1:
The patent transitions from a vertical through-hole structure to a multi-layer horizontal expansion structure. The conductive material is formed in multiple layers (first conductive layer, second conductive layer, third conductive layer) that progressively expand the upper surface area in the horizontal dimension while maintaining connection to the silicon pillar through the vertical dimension. This dimensional transformation resolves the contradiction by providing both low contact resistance (through vertical connection) and large contact margin (through horizontal expansion).
Solution Approach 2:
The patent employs a nested structure where the first conductive layer is positioned at the bottom of the through-hole, the second conductive layer is formed over and expands from the first conductive layer, and the third conductive layer further expands from the second conductive layer. Each layer is nested within and connected to the previous layer, creating a stepped expansion structure that increases the upper surface area while maintaining the vertical connection path to the silicon pillar, thus achieving both low contact resistance and large contact margin.
2Ease of manufacture
If the thickness of the conductive layer is constrained by the thickness of the silicon pillars, then the conductive layer can be formed in self-alignment, but the area of the upper surface of the conductive layer becomes very small and the contact margin of the contact plug becomes small
Solution Approach 1:
The patent maintains self-alignment in the vertical dimension while expanding in the horizontal dimension through multiple conductive layers. The first conductive layer is formed in self-alignment with the silicon pillar using the through-hole as a guide, ensuring easy manufacture. Subsequent conductive layers expand horizontally from this self-aligned base, increasing the upper surface area without compromising the self-alignment advantage. This resolves the contradiction by separating the self-alignment function (vertical) from the area expansion function (horizontal).
Solution Approach 2:
The patent divides the conductive layer into multiple segmented layers (first, second, and third conductive layers) with progressively increasing upper surface areas. Each layer can be formed using standard semiconductor fabrication processes, maintaining ease of manufacture. The segmentation allows the structure to achieve large total area while each individual layer remains compatible with existing manufacturing capabilities, thus resolving the contradiction between ease of manufacture and large area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a relatively large contact margin of the contact plug, enhancing the reliability and performance of the semiconductor device by increasing the area of the conductive layer's upper surface connected to the contact plug, thus improving the operational stability of the transistor.
Implementation Method 1
The silicon-nitride film mask is removed by dry etching or wet etching
Implementation Method 2
The silicon-nitride film mask is removed by dry etching or wet etching
Implementation Method 3
A surface of the interlayer dielectric film is flattened to expose an upper end of the silicon-nitride film mask by using a CMP (Chemical Mechanical Polishing) method
Implementation Method 4
a conductive material is embedded into the through-holes, thereby forming the conductive layer
Data Source
AI summary
To provide a semiconductor device including a first silicon pillar, an interlayer dielectric film provided on an upper surface of the first silicon pillar and having a through-hole filled with a conductive material, and a first-diffusion-layer contact plug provided on an upper-side opening of the through-hole. An area of a lower-side opening of the through-hole is equal to an area of the upper surface of the first silicon pillar, and an area of the upper-side opening of the through-hole is larger than the area of the lower-side opening of the through-hole. With this configuration, an area of a contact surface between the conductive material within the through-hole and the first-diffusion-layer contact plug is larger than the area of the upper surface of the first silicon pillar.