Semiconductor Contact Plug Orientation for Low Resistance
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Solution Overview
Problem
In semiconductor devices, the formation of trenches with buried gate electrodes in peripheral regions is limited, leading to reduced contact plug dimensions and increased contact resistance due to the need to avoid column regions, which restricts the longer-side dimension of the contact plug.
Innovation Solution
The semiconductor device design includes a semiconductor substrate with source, drain, and body regions, where trenches extending from the peripheral region into the effective region allow for a gate electrode with a contact plug that maintains a longer-side dimension along a specific direction, even when the trench cannot be formed linearly, using a staggered arrangement of column regions and extended width portions to minimize contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the trench is formed avoiding the column regions in the peripheral region, then the gate electrode can be properly positioned, but the longer-side dimension of the contact plug is reduced
Solution Approach 1:
The patent changes the orientation of the contact plug from the conventional direction (parallel to the trench) to a new direction (perpendicular to the trench). This dimensional reorientation allows the contact plug to extend in the first direction rather than the second direction, thereby increasing its longer-side dimension while still maintaining proper electrical connection to the gate electrode in the peripheral region.
2Area of stationary object
If the contact plug longer-side dimension is reduced, then the chip area can be reduced, but the contact resistance increases
Solution Approach 1:
The patent reorients the contact plug to extend in the first direction perpendicular to the trench, which increases its longer-side dimension. This dimensional change maintains lower contact resistance while still achieving compact chip area through optimized spatial arrangement of the contact plug relative to the trench and column regions.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a gate electrode, and a first contact plug. The semiconductor substrate includes a first surface and a second surface. Over the semiconductor substrate, a source region, a drain region, a drift region, and a body region are formed. A first trench in which the gate electrode is buried is formed in the first surface. The first surface includes an effective region and a peripheral region. The first trench extends from the peripheral region over the effective region along a first direction. The gate electrode includes a portion opposed to and insulated from the body region sandwiched between the source region and the drift region. In the peripheral region, the first contact plug is electrically coupled to the gate electrode buried in the first trench such that its longer side is along the first direction when seen in a plan view.


