Semiconductor Contact Structure With Treated ILD for Lower Leakage
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Solution Overview
Problem
As semiconductor technology advances to nanometer process nodes, the increasing resistance due to smaller critical dimensions between adjacent metal features in the back-end-of-line (BEOL) of integrated circuits (ICs) poses a significant challenge for achieving high performance and reliability in FinFET devices.
Innovation Solution
The process involves forming semiconductor fins with high aspect ratios, using epitaxial growth to create source/drain features, and implementing a treatment process with helium-based dopant species or plasma to reduce leakage current and enhance the performance of interlayer dielectrics, thereby improving the contact between conductive features and reducing air gaps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the critical dimension between adjacent contact features is reduced to achieve higher device density, then the device density increases, but the resistance increases
Solution Approach 1:
The patent changes the material parameter of the dielectric layer by introducing a nitrogen-containing dielectric material with different physical and chemical properties (higher density, lower porosity) to reduce resistance while maintaining small critical dimensions for high device density
Solution Approach 2:
The patent uses a composite structure consisting of a nitrogen-containing dielectric material combined with other dielectric materials to achieve optimal electrical properties (lower resistance) and mechanical properties (good adhesion, appropriate density) simultaneously
2Quantity of substance
If the critical dimension between adjacent contact features is reduced to achieve higher device density, then the device density increases, but the leakage current increases
Solution Approach 1:
The patent modifies the dielectric layer parameters by incorporating nitrogen-containing materials with specific physical properties (density, porosity, composition) to suppress leakage current while enabling smaller critical dimensions for higher device density
Solution Approach 2:
The patent applies nitrogen-containing dielectric material specifically in regions where leakage current suppression is critical, such as between adjacent contact features, while maintaining other dielectric materials in different regions for their respective functions
3Quantity of substance
If the critical dimension between adjacent contact features is reduced to achieve higher device density, then the device density increases, but the contact performance deteriorates
Solution Approach 1:
The patent changes the physical and chemical parameters of the dielectric material (density, porosity, composition) to improve contact performance by ensuring better adhesion and reducing defects, even at reduced critical dimensions for higher device density
Solution Approach 2:
The patent performs preliminary treatment of the dielectric layer (such as nitrogen incorporation or surface modification) before contact formation to ensure optimal contact performance is achieved from the outset, preventing subsequent performance degradation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes leakage current and enhances the performance of integrated circuits by ensuring better contact between conductive features and reducing air gaps, leading to improved reliability and efficiency in FinFET devices.
Implementation Method 1
implementing a treatment process with helium-based dopant species or plasma to reduce leakage current and enhance the performance of interlayer dielectrics
Implementation Method 2
implementing a treatment process with helium-based dopant species or plasma to reduce leakage current and enhance the performance of interlayer dielectrics
Implementation Method 3
using epitaxial growth to create source/drain features
Data Source
AI summary
Embodiments of the present disclosure relates to a semiconductor device structure. The structure includes a source/drain epitaxial feature disposed over a substrate, a first interlayer dielectric (ILD) disposed over the source/drain epitaxial feature, a second ILD disposed over the first ILD. The second ILD includes a first dopant species having an atomic radius equal to or greater than silicon and a second dopant species having an atomic mass less than 15. The structure also includes a first conductive feature disposed in the second ILD, and a second conductive feature disposed over the source/drain epitaxial feature, the second conductive feature extending through the first ILD and in contact with the first conductive feature.