Semiconductor Pad and Connector Layout for Corner Stress Relief

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Solution Overview

Problem

The semiconductor industry faces challenges in enhancing the integration density and reliability of semiconductor devices due to stress concentration in the corner regions, particularly at the junctions, which are not adequately addressed by existing technologies.

Innovation Solution

The semiconductor device design incorporates specific arrangements of conductive pads and connector structures, with varying dimensions and positions, including passivation and protection layers to mitigate stress concentration during thermal cycling, thereby improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If repeated reductions in minimum feature size are implemented to improve integration density, then more components can be integrated into a given area, but stress concentration in corner regions increases and reliability deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by implementing corner protection structures specifically at corner regions where stress concentration occurs, while leaving other regions with different structural characteristics. This targeted approach addresses the reliability issue in high-stress areas without compromising the overall integration density achieved through feature size reduction.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The corner protection structures serve as beforehand cushioning by providing mechanical support and stress distribution in advance before thermal cycling or mechanical stress occurs. This preventive measure mitigates stress concentration effects before they can cause device failure, thereby improving reliability while maintaining high integration density.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If corner protection structures are added to reduce stress concentration, then reliability improves, but device complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the device structure by adding discrete corner protection structures only at critical corner regions rather than modifying the entire device structure. This segmentation approach improves reliability where needed while minimizing the increase in overall device complexity by limiting the protection structures to specific locations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The corner protection structures introduce asymmetric elements to an otherwise symmetric device layout. This asymmetry is necessary and localized to corner regions where stress concentration occurs during thermal cycling, providing targeted reliability improvement without requiring symmetric modifications throughout the entire device structure.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces stress concentration in corner regions, enhancing the reliability and performance of semiconductor devices by using passivation layers as buffers, thus improving the overall integrity of the semiconductor device.

Implementation Method 1

mitigate stress concentration during thermal cycling

Methodology Applied
Scientific EffectStress concentration mitigation:

Implementation Method 2

stress concentration during thermal cycling

Methodology Applied
Scientific EffectThermal cycling:

Data Source

PatentUS20250364461A1Semiconductor device
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250364461A1 patent drawing
  • US20250364461A1 patent drawing
  • US20250364461A1 patent drawing

AI summary

A semiconductor device including a semiconductor die, a first conductive pad, a second conductive pad, a first connector structure and a second connector structure is provided. The first conductive pad is disposed on the semiconductor die, wherein the first conductive pad has a first lateral dimension. The second conductive pad is disposed on the semiconductor die, wherein the second conductive pad has a second lateral dimension. The first connector structure is disposed on the first conductive pad, wherein the first connector structure has a third lateral dimension greater than the first lateral dimension. The second connector structure is disposed on the second conductive pad, wherein the second connector structure has a fourth lateral dimension smaller than the second lateral dimension.