Semiconductor Crack Detection Using Peripheral Resistor Circuits
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Solution Overview
Problem
Semiconductor chip manufacturing processes, particularly during dicing, often result in crack defects due to external physical forces, leading to malfunctions and reliability issues, necessitating an accurate method for defect detection.
Innovation Solution
A semiconductor device and test apparatus utilizing external and internal resistor circuits with transistors and test pads to detect defects by comparing resistance changes, allowing for precise identification of defect occurrence and location.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dicing process is performed to separate semiconductor chips, then individual packaging is enabled, but crack defects occur at cut surfaces and peripheries
Solution Approach 1:
The patent applies preliminary action by incorporating test circuits and test pads into the semiconductor chip structure before the dicing process. This allows defect detection to be prepared in advance, so that when cracks occur during dicing, the damage can be immediately identified through electrical testing rather than discovered later during packaging or operation.
Solution Approach 2:
The patent replaces mechanical inspection methods with electrical measurement systems. Instead of using physical or visual inspection to detect cracks, the invention uses electrical circuits to measure resistance changes that indicate the presence of cracks, providing a more sensitive and automated detection method.
2Measurement precision
If external resistor circuits are added for defect detection, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by placing test circuits and test pads at specific locations on the chip, particularly near the periphery where cracks are most likely to occur during dicing. The external resistor circuits are strategically positioned to detect cracks at critical areas without requiring comprehensive coverage of the entire chip, thus maintaining simplicity while achieving high detection precision at key locations.
Solution Approach 2:
The patent uses parameter changes by measuring resistance variations in the external resistor circuits to detect cracks. When a crack occurs, it affects the electrical resistance of the circuit, and this parameter change is measured to identify the defect. This approach converts a physical defect (crack) into an electrical parameter (resistance) that can be easily measured and interpreted.
3Measurement precision
If multiple external resistor circuits are dispersed along outer region, then defect detection coverage is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the defect detection function into multiple external resistor circuits positioned at different locations along the outer region of the chip. Each circuit independently monitors a specific area, and by segmenting the detection coverage, the system achieves comprehensive defect detection without requiring a single complex detection mechanism. This segmented approach simplifies manufacturing as each circuit can be independently fabricated using standard processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and reliable detection of defects, preventing quality accidents by determining defective chips and improving semiconductor chip reliability through electrical testing.
Implementation Method 1
the external resistor circuit may include an external resistor structure including at least one of a diffusion layer, a polysilicon layer, and a wiring layer
Data Source
AI summary
The present disclosure relates to a semiconductor device, and a test apparatus and method thereof, capable of accurately detecting a defect by using a plurality of resistor circuits in a test process. The test apparatus of a semiconductor device according to an aspect of the present disclosure may include semiconductor chips each including an external resistor circuit disposed to be dispersed along an outer region of a chip and an internal resistor circuit disposed in an inner region of the chip in order to test cracks, and test equipment that drives the external resistor circuit and the internal resistor circuit and compares an output of the external resistor circuit with an output of the internal resistor circuit to detect whether a defect occurs in each of the semiconductor chips.


