Semiconductor Memory Crossbar Integration for Faster AI Learning
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Solution Overview
Problem
Conventional synapse array devices experience low data transmission efficiency and prolonged processing times during AI learning due to the inefficiencies in reading and writing data between flash memory and crossbar arrays.
Innovation Solution
A semiconductor memory device incorporating a NOR-type or NAND-type memory cell array and a crossbar array, with a connection device linking the two, enabling efficient data transfer through a column writing and reading mechanism, utilizing variable resistor elements for resistance modulation based on learning data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is read from flash memory and written to crossbar array during AI learning, then learning functionality is achieved, but data transmission efficiency is low and processing time is prolonged
Solution Approach 1:
The patent combines the flash memory array and crossbar array into a single integrated memory device, eliminating the need for external data transfer between separate components. The flash memory cell array and crossbar array are formed on the same semiconductor substrate, allowing direct electrical connection and instantaneous data sharing between the two arrays, thereby resolving the data transmission efficiency and processing time issues.
Solution Approach 2:
The memory device performs multiple functions within a single integrated structure: the flash memory cell array provides non-volatile data storage, while the crossbar array with variable resistor elements enables neuromorphic computing operations. This multi-functional integration allows the device to simultaneously serve as both storage and processing unit, improving overall productivity and reducing processing time for AI learning operations.
2Productivity
If conventional flash memory and crossbar array are used separately, then device complexity is reduced, but data transmission efficiency deteriorates
Solution Approach 1:
The patent integrates the flash memory cell array and crossbar array on the same semiconductor substrate with direct electrical connections, eliminating the need for complex external data transfer interfaces and control circuits. This integration simplifies the overall device architecture while dramatically improving data transmission efficiency between the two functional arrays.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the processing and handling of AI learning by improving data transmission efficiency and reducing processing time through optimized data handling between memory cell and crossbar arrays.
Implementation Method 1
The variable resistor elements 3 are non-volatile memory elements, memorizing different resistances by applying voltages or currents thereto
Implementation Method 2
The connection device connects a selected bit line of the memory cell array to the crossbar array according to a selection signal
Implementation Method 3
writes data read from the memory cell array to a selected column of the crossbar array
Implementation Method 4
reads data from the selected column of the crossbar array
Data Source
AI summary
A semiconductor memory device has a NOR-type memory cell array, a crossbar array, an entry gate, and a column selecting/signal processing unit. The crossbar array has a plurality of rows and columns, variable resistor elements formed in intersections of rows and columns respectively. The entry gate arranged between the memory cell array and the crossbar array, connects a selected bit line of the memory cell array to the crossbar array based on a selection signal. The column selecting/signal processing unit has a column writing unit, a column reading unit, and a NOR writing unit. The column writing unit writes data read from the memory cell array to a selected column of the crossbar array. The column reading unit reads data of the selected column of the crossbar array. The NOR writing unit at least writes data read by the column writing unit to the memory cell array.