Semiconductor Device Crystallization Using Substrate Seed Layer

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Solution Overview

Problem

Conventional semiconductor devices, such as PRAMs, face challenges in achieving high integration density due to the difficulty in forming single-crystalline semiconductor layers, which limits their area efficiency and electrical performance.

Innovation Solution

A method is developed to crystallize a semiconductor layer spaced apart from a substrate using a deposition process, where a non-single-crystalline semiconductor layer is formed on a substrate with exposed portions, and the substrate acts as a seed layer to change the crystalline state to single-crystalline, allowing for the formation of a single-crystalline semiconductor pattern on an interconnection line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a non-single-crystalline semiconductor layer is formed using deposition process, then manufacturing ease is improved, but manufacturing precision deteriorates due to inability to form single-crystalline structure

Engineering Contradiction:

Improveease of forming semiconductor layerVSAvoidcrystalline structure quality

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The substrate is prepared in advance with specific surface treatment and crystal orientation before deposition, serving as a seed layer that enables the deposited non-single-crystalline material to transform into single-crystalline structure during subsequent annealing or growth processes

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The crystalline state of the semiconductor layer is changed by controlling deposition parameters (temperature, pressure, gas flow) and subsequent thermal processing parameters (annealing temperature, time, atmosphere) to transform from non-single-crystalline to single-crystalline structure

Inventive Principle:

Principle #35Parameter changes

2Reliability

If conventional PRAM structure with transistor and phase-change pattern is used, then electrical performance is improved, but area efficiency deteriorates resulting in lower integration density

Engineering Contradiction:

Improveelectrical characteristicsVSAvoidunit cell area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The semiconductor layer is extended vertically above the substrate surface, utilizing the third dimension (height) to accommodate the phase-change pattern and electrode structures, thereby reducing the horizontal footprint and unit cell area while maintaining electrical functionality

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Multiple functional components (semiconductor layer, phase-change pattern, electrodes, insulating layers) are nested vertically within a compact structure, with each layer positioned above the previous one, achieving high integration density similar to NAND flash memory

Inventive Principle:

Principle #7Nested doll (Nesting)

3Manufacturing precision

If single-crystalline semiconductor layer is formed by conventional methods, then manufacturing precision is improved, but device complexity increases due to process difficulty

Engineering Contradiction:

Improvesingle-crystalline structure qualityVSAvoidfabrication process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The substrate serves as an intermediary seed layer that facilitates the formation of single-crystalline structure in the deposited semiconductor material, eliminating the need for complex epitaxial growth or crystal pulling processes

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The mechanical and thermal processes traditionally required for single-crystalline formation (Czochralski method, epitaxial growth) are replaced by deposition followed by thermal annealing, simplifying the fabrication process while achieving single-crystalline quality

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of highly integrated semiconductor devices with reduced unit cell area, achieving excellent electrical characteristics and high integration density similar to NAND flash memory devices, while enabling fast read/write operations at low voltages without the need for refresh operations.

Implementation Method 1

using the substrate as a seed layer, changing the crystalline state of the semiconductor layer to be single-crystalline

Methodology Applied

Scientific EffectCrystallization: Crystallisation

Implementation Method 2

forming a non-single-crystalline semiconductor layer on the substrate

Methodology Applied

Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS7803697B2Highly integrated semiconductor device and method of fabricating the same

Publication Date: 2010.09.28 SAMSUNG SDI CO LTD

AI summary

A method of fabricating a semiconductor device includes sequentially forming a first pattern and a second pattern on a substrate, the second pattern being a non-single-crystalline semiconductor stacked on the first pattern, wherein a portion of the substrate is exposed adjacent to the first and second patterns, forming a non-single-crystalline semiconductor layer on the substrate, the semiconductor layer contacting the second pattern and the exposed portion of the substrate, and, using the substrate as a seed layer, changing the crystalline state of the semiconductor layer to be single-crystalline and changing the crystalline state of the second pattern to be single-crystalline.