Semiconductor Cu Diffusion Blocking Layer via Segmented Plating
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Solution Overview
Problem
Existing semiconductor device manufacturing methods using vacuum film-forming techniques and electroless plating face challenges in achieving high covering ability and effective Cu diffusion blocking, leading to inadequate Cu diffusion prevention and device stability issues due to anisotropic film formation and insufficient Cu diffusion blocking effects.
Innovation Solution
A method involving electroless and electroplating processes to form a diffusion blocking layer with a larger crystal grain size, using a Pd—Ga—As layer, an electrolessly plated NiP layer, and an electroplated Pd layer, followed by a Cu or Ag metal layer, ensuring complete coverage and enhanced Cu diffusion blocking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Cu diffusion blocking layer is formed by vacuum film-forming method, then the Cu diffusion blocking effect is enhanced, but the covering ability is inadequate
Solution Approach 1:
The diffusion blocking function is divided into two separate layers: a vacuum-formed blocking layer (Ta or W) for Cu diffusion prevention and a plating-formed covering layer (Pd or Pt) for complete surface coverage. This segmentation allows each layer to optimize its specific function without compromise.
Solution Approach 2:
The invention uses a composite structure combining two different deposition methods: vacuum deposition for the blocking layer and electroless/electro plating for the covering layer. This composite approach leverages the advantages of both methods to achieve both high blocking effect and excellent covering ability.
2Manufacturing precision
If a Pd plating layer is formed by electroless plating, then the covering ability is improved, but the Cu diffusion blocking effect is inadequate
Solution Approach 1:
The diffusion blocking function is divided into two separate layers: a vacuum-formed blocking layer (Ta or W) for Cu diffusion prevention and a plating-formed covering layer (Pd or Pt) for complete surface coverage. This segmentation allows each layer to optimize its specific function without compromise.
Solution Approach 2:
The vacuum-formed blocking layer acts as an intermediary barrier between the substrate and the Pd plating layer, preventing Cu diffusion while allowing the Pd layer to provide excellent covering ability without needing to perform the blocking function itself.
3Adaptability or versatility
If vacuum film-forming method is used, then various metal films can be formed, but the anisotropic nature reduces covering ability on substrates with projections or recesses
Solution Approach 1:
The vacuum-formed blocking layer serves as an intermediary foundation that provides both diffusion blocking and initial coverage, while the subsequent plating process acts as a mediator to achieve complete conformal coverage of complex substrate surfaces including projections and recesses.
Solution Approach 2:
The invention changes the deposition parameter from vacuum-based physical deposition to solution-based electrochemical plating, which fundamentally alters the deposition mechanism to achieve isotropic conformal coverage on complex surfaces while maintaining the blocking function through the layered structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves high covering ability and significant Cu diffusion blocking, preventing Cu migration into the substrate, thereby stabilizing semiconductor device characteristics and improving heat dissipation and electrical contact.
Implementation Method 1
immersing a substrate in a solution containing metal ions to adhere a metal catalyst to a surface of the substrate
Implementation Method 2
immersing the substrate with the metal catalyst adhered thereto in an electroless plating solution to electrolessly plate a layer on the substrate
Implementation Method 3
immersing the substrate in an electroplating solution to electroplate a layer on the electrolessly plated layer using the electrolessly plated layer as a power feeding layer
Implementation Method 4
immersing the substrate in an electroplating solution to electroplate a layer on the electrolessly plated layer and the plated Au layer using the electrolessly plated layer and the plated Au layer as power feeding layers
Data Source
AI summary
A method of manufacturing a semiconductor device includes the steps of immersing a substrate in a solution containing metal ions to adhere a metal catalyst to a surface of the substrate, immersing the substrate with the metal catalyst adhered thereto in an electroless plating solution to electrolessly plate a layer on the substrate, immersing the substrate in an electroplating solution to electroplate a layer on the electrolessly plated layer using the electrolessly plated layer as a power feeding layer, and forming a metal layer of Cu or Ag on the electroplated layer. The electroplated layer is formed of a different material than the metal layer.