Semiconductor Data Bit Inversion for Current Reduction

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Solution Overview

Problem

Semiconductor apparatuses face challenges in reducing current consumption during data transmission operations, as existing methods are inefficient in minimizing power usage.

Innovation Solution

A semiconductor apparatus with a data bit inversion function is designed, comprising a first semiconductor chip and a second semiconductor chip stacked via through vias, where the first chip receives data and a data bit inversion flag, and the second chip inverts and stores the data according to the flag, optimizing data transmission and reducing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data is transmitted using conventional methods in semiconductor apparatuses, then data transmission function is maintained, but current consumption increases

Engineering Contradiction:
Improvecurrent consumptionVSAvoiddata transmission reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies data bit inversion by inverting the data bits before transmission. When the DBI flag indicates inversion is needed, the transmitter inverts the data bits (e.g., 0 becomes 1, 1 becomes 0) before sending through the via. The receiver then inverts them again to recover the original data. This inversion technique reduces the number of bit transitions during transmission, thereby reducing current consumption while maintaining data integrity through the flag-controlled inversion process.

Inventive Principle:
Principle #13The other way round (Inversion)

2Use of energy by moving object

If stacked semiconductor chips are used to reduce current consumption, then power usage decreases, but device complexity increases

Engineering Contradiction:
Improvepower usageVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent utilizes a three-dimensional stacked chip architecture where the first semiconductor chip is vertically stacked with the second semiconductor chip. Data transmission occurs through through-silicon vias that penetrate the first chip to reach the second chip. This vertical stacking approach reduces the transmission distance and parasitic effects compared to planar layouts, enabling current consumption reduction while managing complexity through standardized 3D integration techniques.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces a via structure as an intermediary element that facilitates data transmission between the first semiconductor chip and the second semiconductor chip. The via acts as a conductor that enables electrical connection through the stacked chips, allowing the DBI function to be implemented across multiple chip layers. This intermediary structure is essential for achieving the power reduction goal while maintaining a manageable device architecture through modular stacking.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8923079B1Semiconductor apparatus having a data bit inversion function
Publication Date: 2014.12.30 SK HYNIX INC
  • US8923079B1 patent drawing
  • US8923079B1 patent drawing
  • US8923079B1 patent drawing

AI summary

A semiconductor apparatus having a data bit inversion function and, the semiconductor apparatus including a first semiconductor chip and a second semiconductor chip electrically coupled to the first semiconductor chip, wherein the first semiconductor chip may be configured to receive data and a data bit inversion flag, and transfer the data to the second semiconductor chip, and the second semiconductor chip may be configured to invert and store the data, which is transferred from the first semiconductor chip, according to to the data bit inversion flag.