Semiconductor Data Retention via Dummy I/O Pad

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Volatile memory devices lose data when powered off without prior notice due to the need for continuous power supply, leading to data loss and inefficiencies in data retention and recovery.

Innovation Solution

A semiconductor device with a controller generating a data retention path control signal to couple global I/O lines to a dummy I/O line, allowing data to be serialized and stored in a non-volatile memory when power is off, and recovered when power is restored, using existing redundant I/O elements to minimize size and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a volatile memory device is used to achieve high operation speed and high integration degree, then the operation speed and integration degree are improved, but data is lost when power is abruptly turned off

Engineering Contradiction:
Improveoperation speedVSAvoiddata retention reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A non-volatile memory device is introduced as an intermediary between the volatile memory device and external storage. This intermediary captures data from the volatile memory through a dummy I/O pad when power is turned off, preventing data loss while maintaining the high-speed characteristics of the volatile memory during normal operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary data capture action by automatically transferring data from volatile memory to non-volatile memory when a power-off condition is detected. This preliminary action occurs before complete power loss, ensuring data is preserved without requiring user intervention or complex control logic.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a non-volatile memory device is added as backup memory to prevent data loss, then data retention reliability is improved, but device size increases

Engineering Contradiction:
Improvedata retention reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The dummy I/O pad, which is a redundant element in the volatile memory device, is repurposed to serve multiple functions: it acts as a data output path during normal operation and as a data input path for the non-volatile memory during power-off conditions. This multi-functionality eliminates the need for separate dedicated I/O paths, reducing overall device area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system discards the use of redundant dummy I/O pads that would otherwise be wasted resources. By recovering and utilizing these pads for data retention functionality, the patent transforms waste into value, achieving data protection without proportionally increasing device area.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If data is transferred to non-volatile memory when powered off to prevent data loss, then data retention reliability is improved, but power loss increases due to additional operations

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidpower loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent converts the harmful effect of power loss into a beneficial opportunity. When power is turned off (a harmful event for volatile memory), the system automatically captures and preserves data in non-volatile memory. The power-off condition itself triggers the data protection mechanism, turning a detrimental event into a protective action without requiring additional power consumption during the transfer.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9355723B1Semiconductor device including a non-volatile memory preserving data stored in a volatile memory when powered off
Publication Date: 2016.05.31 SK HYNIX INC
  • US9355723B1 patent drawing
  • US9355723B1 patent drawing
  • US9355723B1 patent drawing

AI summary

A semiconductor device may include a controller configured to generate a data retention path control signal in response to a power condition change signal. The semiconductor device may include a plurality of data retention paths configured to sequentially couple a plurality of global input/output (I/O) lines coupled to a volatile memory to a dummy I/O line in response to the data retention path control signal. The semiconductor device may include a dummy I/O pad coupled to the dummy I/O line. The semiconductor device may include a non-volatile memory device coupled to the dummy I/O pad, configured to retain a plurality of storage data received from the volatile memory when the volatile memory is powered off, or provide data retained in the volatile memory as recovery data when power is recovered by the volatile memory.