Semiconductor Device with Deep Plug for Field Control
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Solution Overview
Problem
Existing methods for manufacturing power semiconductor devices, such as MOSFETs, face challenges with mask misalignments and difficulties in doping concentration control, leading to undesired neutralized zones and premature device breakdown due to high electric field peaks.
Innovation Solution
A method involving a wide bandgap substrate with a lowly doped drift layer, source regions, channel layers, and well layers, where a deep highly doped plug is used to separate the source regions from the drift layer, reducing electric field strength and preventing overcompensation, thus avoiding neutral zones and improving device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shallow contact layer is used to provide ohmic contact, then good electrical contact is achieved, but the layer cannot reach the well layers to connect them to the source electrode
Solution Approach 1:
The contact structure is divided into two functional segments: a shallow contact layer (65) that provides ohmic contact to the source regions, and deep contact layers (61, 61') that extend to and connect with the well layers. This segmentation allows each layer to perform its specific function optimally without compromising the other.
Solution Approach 2:
The solution transitions from a single-layer contact approach to a multi-layer vertical structure. The deep contact layers extend in the depth dimension to reach the well layers, while the shallow contact layer operates at a different depth level to provide surface ohmic contact, effectively utilizing vertical dimensionality to resolve the conflicting requirements.
2Manufacturing precision
If four different masks are used for forming layers, then precise layer formation is achieved, but mask misalignments occur and the process becomes more difficult
Solution Approach 1:
The formation of channel layers and well layers is merged into a single implantation process using a single mask pattern. The mask is designed with openings that simultaneously define both the channel layer regions and well layer regions, eliminating the need for separate masking steps and reducing alignment errors.
Solution Approach 2:
The mask pattern is designed in advance to pre-definе both channel and well layer regions before implantation. This preliminary design allows both layers to be formed with a single mask application, avoiding subsequent alignment issues that would arise from multiple sequential masking steps.
3Manufacturing precision
If angled implantation is used for forming layers, then layer formation is achieved, but the implantation process becomes more difficult
Solution Approach 1:
Instead of using angled implantation to achieve lateral separation of layers, the invention inverts the approach by using vertical implantation with a strategically designed mask pattern. The mask openings are positioned to allow dopant diffusion to reach the desired lateral regions through vertical paths, simplifying the implantation process while achieving the same structural outcome.
4Quantity of substance
If n source layers and p plug have comparable doping concentration, then both layers can be formed, but compensated charges occur creating undesired neutralized zones
Solution Approach 1:
The invention applies different doping concentrations to different regions: the source regions use high doping concentration (1E19 to 1E21 atoms/cm³) while the plug uses moderate doping concentration (1E16 to 1E18 atoms/cm³). This local differentiation prevents charge compensation and neutralized zones by ensuring a clear dominance of one charge type in each region, while still achieving the desired electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances electrical properties by reducing parasitic actions and short-channel effects, allowing for higher forward blocking voltages and improved ohmic contact, leading to more reliable and efficient power semiconductor devices.
Implementation Method 1
applying a first dopant of the second conductivity type for forming two channel layers up to the channel layer depth
Implementation Method 2
applying a second dopant of the first conductivity type for forming the two source regions up to the source region depth
Implementation Method 3
applying a third dopant of the second conductivity type for forming the at least one well layer up to the well layer depth
Data Source
AI summary
A method of manufacturing a semiconductor device is provided with: (a) providing a wide bandgap substrate product, (b) forming source regions by applying a first mask with a first and second mask layer and applying an n dopant, forming a well layer by removing such part of the first mask, which is arranged between the two source regions, and applying a p dopant, forming two channel regions by forming a third mask by performing an etching step, by which the first mask layer is farther removed at the openings than the second mask layer, and then removing the second mask layer, wherein the remaining first mask layer forms a third mask and applying a p dopant, wherein a well layer depth is at least as large as a channel layer depth, (c) after step (b) for forming a plug applying a fourth mask, which covers the source regions and the channel layers and applying a p fourth dopant to a greater depth than the well layer depth and with a higher doping concentration than the well layers.