Semiconductor Device Self-Inductance Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices face challenges in reducing self-inductance of internal wiring, leading to increased surge voltage and electromagnetic interference, especially with high-speed switching elements like SiC devices, which can result in device breakdown and reliability issues.
Innovation Solution
A semiconductor device design with a configuration that minimizes self-inductance by optimizing the arrangement and length of wires and conductor layers between switching elements and terminals, using a multi-layered Direct Bond Copper (DBC) substrate and specific wire routing to reduce inductance and enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed switching elements (SiC devices) are used to improve switching speed, then switching loss is reduced, but surge voltage increases
Solution Approach 1:
The patent changes the physical parameters of the internal wiring, specifically reducing wire length and optimizing conductor layer configurations. By modifying these parameters, the self-inductance is reduced, which directly addresses the surge voltage issue while maintaining high-speed switching performance
Solution Approach 2:
The patent utilizes multi-layered DBC substrates with conductor layers arranged in different spatial dimensions. By stacking conductor layers vertically and optimizing their positions across multiple layers, the patent reduces the effective inductance path length in three-dimensional space, thereby reducing surge voltage
2Object-generated harmful factors
If wire length is reduced to minimize self-inductance, then surge voltage is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent merges the wiring structure with the DBC substrate by integrating conductor layers directly into the substrate layers. This integration eliminates separate wiring steps and combines multiple functions (structural support, heat dissipation, and electrical connection) into a unified multi-layered structure, reducing manufacturing complexity despite the optimized wire arrangements
Solution Approach 2:
The DBC substrate serves multiple functions simultaneously: it provides mechanical support, heat dissipation pathways, and electrical connections. The conductor layers within the substrate perform both structural and electrical functions, reducing the need for separate wiring components and simplifying the overall manufacturing process
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Disclosed is a semiconductor device having a structure capable of reducing the self-inductance of internal wiring. The semiconductor device includes: a lower board having a lower conductor layer formed on the surface thereof; a switching element bonded to the lower conductor layer in an element bonding area; a terminal bonded to the lower conductor layer in a terminal bonding area; an upper board stacked on the lower board in a board bonding area between the element bonding area and the terminal bonding area, and having an upper conductor layer on the surface thereof; and a switching element connecting member which connects the switching element with the upper conductor layer.