Semiconductor Device Thermal Conductive Dielectric Interlayer
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Solution Overview
Problem
Conventional semiconductor device encapsulation methods face challenges in achieving a thin, void-free encapsulating layer with high thermal conductivity, as reducing the thickness of the mold compound layer leads to increased manufacturing losses due to air bubbles and poor thermal dissipation performance.
Innovation Solution
A semiconductor device with a thermally conductive, dielectric interlayer material, such as a silicone elastomer, is applied to the electrically conductive attachment region, allowing for a reduced housing thickness while maintaining high dielectric strength and effective thermal conductivity, preventing voids and improving heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the thickness of the mold compound encapsulating layer is reduced to improve heat dissipation and device performance, then thermal conductivity and device performance are improved, but manufacturing precision deteriorates due to increased difficulty in obtaining void-free encapsulation
Solution Approach 1:
The patent changes the physical and chemical parameters of the mold compound by incorporating specific filler materials (such as aluminum oxide, aluminum nitride, or boron nitride particles) and adjusting the resin composition. This modifies the viscosity, thermal conductivity, and flow characteristics of the mold compound, enabling it to properly fill thin encapsulation spaces while maintaining void-free quality and improving heat dissipation.
Solution Approach 2:
The patent uses composite mold compound materials consisting of a resin matrix combined with thermally conductive filler particles. This composite structure provides both the necessary flow properties for thin-layer encapsulation and enhanced thermal conductivity, resolving the contradiction between reduced thickness and manufacturing quality.
2Length of stationary object
If the distance between inner mold surfaces and the device is reduced to make the encapsulating coating thinner, then housing thickness is reduced, but manufacturing precision worsens as it becomes more difficult to obtain high quality void-free encapsulation
Solution Approach 1:
The patent modifies the flow parameters of the mold compound through composition adjustments, enabling it to properly fill very thin gaps (as thin as 0.05 inches or 1.27 mm) between the mold surfaces and device. This allows reduced encapsulation thickness while maintaining complete void-free filling through optimized viscosity and flow characteristics.
3Length of stationary object
If conventional mold compound is used with reduced encapsulating layer thickness, then housing thickness is reduced, but reliability deteriorates due to formation of air bubbles and voids in the encapsulation
Solution Approach 1:
The patent changes the rheological parameters of the mold compound to ensure complete displacement of air from the mold cavity before the compound sets. This includes adjusting viscosity, addition rate, and flow characteristics to prevent air bubble entrapment even in thin encapsulation layers, thereby maintaining reliability while reducing housing thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a significant reduction in housing thickness by up to 50% without compromising dielectric strength or thermal performance, enhancing semiconductor device reliability and heat dissipation capabilities.
Implementation Method 1
A thermally conductive, dielectric interlayer material, such as a silicone elastomer, is applied to the electrically conductive attachment region
Implementation Method 2
A thermally conductive, dielectric interlayer material, such as a silicone elastomer, is applied to the electrically conductive attachment region
Data Source
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AI summary
A semiconductor device mountable to a substrate is provided. The device includes a semiconductor die and an electrically conductive attachment region having a first attachment surface and a second attachment surface. The first attachment surface is arranged for electrical communication with the semiconductor die. An interlayer material is formed on the second attachment surface of the electrically conductive attachment region. The interlayer material is a thermally conductive, dielectric material. A housing at least in part encloses the semiconductor die and the interlayer material.