Semiconductor Die Alignment via Scanner-Stepper Feedback
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Solution Overview
Problem
The existing connection technologies for semiconductor chips are time-consuming and expensive due to the small size of contact pads and potential misalignment during chip placement and encapsulation, which can affect the electrical connection between external contact elements and the chip pads.
Innovation Solution
A method that involves using a scanner to measure the locations of semiconductor dies on a carrier and communicate this information to a photolithographic stepper, allowing the stepper to align only once and expose the dies accurately, forming openings that align with the contact pads to ensure precise electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional connection technologies are used to connect external contact elements to small contact pads, then electrical connection can be achieved, but the process becomes time-consuming and expensive
Solution Approach 1:
The patent performs preliminary measurement of die locations with a scanner before the photolithographic exposure process. This advance measurement and communication of location data to the stepper enables the system to prepare alignment information in advance, eliminating time-consuming adjustments during the actual connection process and improving throughput while maintaining connection reliability.
2Ease of manufacture
If traditional alignment methods are used during chip placement and encapsulation, then chips can be positioned, but misalignment occurs affecting electrical connection
Solution Approach 1:
The patent implements a feedback mechanism where a scanner measures the actual locations of semiconductor dies on the carrier and communicates this information to the photolithographic stepper. The stepper uses this feedback data to adjust its exposure positions, compensating for any misalignment that occurred during chip placement and encapsulation, thereby ensuring precise alignment between external contact elements and contact pads.
3Manufacturing precision
If multiple alignment steps are performed to ensure precise exposure of each die, then manufacturing precision improves, but processing time increases
Solution Approach 1:
The patent performs preliminary measurement of die locations with a scanner before the photolithographic exposure process. This advance measurement and communication of location data to the stepper enables the system to prepare alignment information in advance, allowing single-alignment exposure without time-consuming repeated adjustments, thus improving throughput while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves the throughput and accuracy of electrical connections in semiconductor packaging, reducing processing time and enhancing the reliability of connections by accounting for die misalignment, thereby improving the electrical performance of semiconductor packages.
Implementation Method 1
measuring locations of semiconductor dies placed on a carrier with a scanner to generate die location information
Implementation Method 2
exposing at least one of the dies on the carrier with the photolithographic stepper based on the die location information
Data Source
AI summary
A method of processing semiconductor chips includes measuring locations of semiconductor dies placed on a carrier with a scanner to generate die location information, and communicating the die location information to a photolithographic stepper. The method includes aligning the photolithographic stepper with the carrier only one time, and exposing at least one of the dies on the carrier with the photolithographic stepper based on the die location information generated by the scanner.