Semiconductor Die Singulation Using Varied Carrier Substrate Temperature
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Solution Overview
Problem
The semiconductor industry faces challenges in singulating die from wafers due to the inability of existing methods to effectively remove or separate backside layers from singulation lines, which hinders subsequent processing and increases manufacturing costs and damage to the die.
Innovation Solution
A method involving plasma etching and mechanical separation using carrier tapes and localized pressure to form narrow singulation lines that stop proximate to the backside layers, allowing for efficient removal of these layers while minimizing damage to the die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If plasma dicing is used to singulate die, then throughput is increased and scribe line width is reduced, but backside layers cannot be effectively removed or separated from singulation lines
Solution Approach 1:
The patent segments the singulation process into two distinct stages: first forming narrow etched grooves through the wafer thickness, then separately removing backside layers. This segmentation allows each process to be optimized independently, solving the contradiction by enabling both high throughput plasma dicing and effective backside layer removal.
Solution Approach 2:
The patent performs preliminary etching to form grooves through the wafer thickness before attempting backside layer removal. This preliminary action creates defined pathways that facilitate subsequent backside layer separation, resolving the contradiction by preparing the structure in advance for easier backside layer removal while maintaining narrow scribe lines.
2Ease of manufacture
If traditional scribing with diamond cutting wheel is used, then backside layers can be removed, but scribe grid width must be large (150 microns) and processing time exceeds one hour per line
Solution Approach 1:
The patent replaces the mechanical diamond cutting wheel system with a plasma-based etching system. This substitution enables narrow scribe line formation with high throughput while maintaining the capability to remove backside layers, directly resolving the contradiction between manufacturing ease and productivity.
Solution Approach 2:
The patent changes the fundamental parameter of scribe line width from 150 microns (mechanical scribing) to significantly narrower dimensions (plasma etching). This parameter change, combined with the two-stage process, achieves both high throughput and effective backside layer removal, resolving the productivity contradiction.
3Productivity
If narrow scribe lines are formed through complete wafer penetration, then throughput is increased, but backside layers remain attached and contaminate subsequent processing
Solution Approach 1:
The patent segments the singulation depth into two parts: etched grooves extending through the wafer thickness, and separate backside layer removal. This segmentation prevents contamination by ensuring backside layers are removed in a controlled second stage rather than remaining attached during high-speed processing.
Solution Approach 2:
The etched grooves act as intermediaries that facilitate controlled backside layer removal. These grooves provide defined pathways that guide the separation process, enabling high throughput while preventing uncontrolled contamination from attached backside layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances throughput, reduces manufacturing costs, and minimizes contamination and damage to the die by enabling precise and efficient separation of backside layers during the singulation process.
Implementation Method 1
plasma dicing has had manufacturing implementation challenges
Implementation Method 2
the etch process has been unable to effectively remove or separate the backside layers from the singulation lines
Implementation Method 3
A heated carrier substrate semiconductor die singulation method
Data Source
AI summary
In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. A support structure is used to heat and/or cool at least the first carrier-substrate while the localized pressure is applied.