Semiconductor Die Output Voltage Level Matching
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Solution Overview
Problem
Semiconductor devices experience signal distortion due to increasing signal frequencies between memory controllers and semiconductor devices, and existing termination methods, such as using resistors, are inefficient as they absorb signal reflections and vary with process, voltage, and temperature changes, leading to mismatched output voltages across individual dies.
Innovation Solution
A semiconductor device design that includes multiple dies with input and output pads, where each die receives feedback reference voltages to correct output voltage levels, using a System On Chip (SOC) to perform level matching through correction signals, and incorporates a reference voltage trimming unit, selection unit, and correction unit to adjust resistance values and match output voltages across dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If termination processing is performed using external resistors, then signal distortion is reduced, but device complexity and power consumption increase
Solution Approach 1:
The patent merges the termination function with the output buffer by integrating the termination resistor directly into the output stage circuitry. This combination eliminates the need for separate external termination components, reducing device complexity while maintaining signal quality through proper impedance matching.
Solution Approach 2:
The patent extracts the termination function from external components and relocates it to the output buffer stage. By taking out the termination requirement from the external circuit and embedding it within the device, the solution reduces external component needs and simplifies the overall system architecture.
2Reliability
If termination resistors are used, then signal reflection is absorbed, but power consumption increases
Solution Approach 1:
The patent implements dynamic control of the termination resistor through a switch element that can selectively connect or disconnect the termination function. This dynamic approach allows the termination resistor to be activated only when needed for signal quality, reducing continuous power consumption while maintaining reliability during critical signal transitions.
Solution Approach 2:
The patent applies termination processing locally at the output buffer stage rather than through continuous external resistance. By concentrating the termination effect at the specific location where signal reflection occurs and controlling it locally, the solution maintains signal quality without the ongoing power penalty of continuous external termination.
3Ease of manufacture
If output voltage levels are not matched across dies, then manufacturing is simpler, but signal distortion increases
Solution Approach 1:
The patent introduces adjustable parameters in the form of trimmable reference voltages for each die's output buffer. By allowing parameter adjustment of the reference voltage levels, the system can compensate for die-to-die variations and match output voltage levels across multiple dies, improving signal quality without significantly complicating the manufacturing process.
Solution Approach 2:
The patent implements a feedback mechanism where output voltage levels from different dies are monitored and compared against reference levels. This feedback allows for automatic adjustment and matching of output voltages across dies, ensuring signal quality while maintaining manufacturing simplicity through self-calibration capabilities.
Data Source
AI summary
The semiconductor device includes: a first die configured to include a first input pad and a first output pad; and a second die configured to include a second input pad and a second output pad. The second die corrects a level of an output voltage in response to a feedback reference voltage applied from the first output pad to the second input pad.