Semiconductor Device Small-Amplitude Differential Signaling
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Solution Overview
Problem
Current semiconductor devices face challenges in efficiently transferring high-speed and stable small-amplitude data signals between stacked memory chips and interface chips, leading to increased circuit surface areas and complexity due to the need for multiple signal lines and TSVs.
Innovation Solution
A semiconductor device configuration utilizing a small-amplitude circuit with a drive circuit and receiving circuit, facilitated by through-silicon vias (TSVs) or transmission lines, allows for efficient data transfer between memory chips and an interface chip using an 8n-bit bus width, reducing the number of signal lines and circuit surface areas by transferring data as a single-phase signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple signal lines and TSVs are used for data transfer between stacked memory chips and interface chips, then data transfer stability is improved, but circuit surface area and device complexity increase
Solution Approach 1:
The patent merges multiple signal lines into a single differential signal pair by using complementary signaling. Instead of transferring each bit on a separate signal line, the invention uses a pair of differential signals where one signal is the logical inverse of the other, allowing multiple data bits to be encoded and transmitted through a reduced number of physical connections between stacked memory chips and the interface chip.
Solution Approach 2:
The differential signal pair serves multiple functions simultaneously: it provides data transfer, inherent noise immunity through differential signaling, and automatic error detection capability. This multi-functionality reduces the need for additional dedicated signal lines for error checking and correction, thereby reducing overall circuit complexity while maintaining reliable data transfer.
2Reliability
If multiple signal lines and TSVs are used for data transfer between stacked memory chips and interface chips, then data transfer stability is improved, but circuit surface area increases
Solution Approach 1:
The patent merges multiple signal lines into a single differential signal pair by using complementary signaling. Instead of transferring each bit on a separate signal line, the invention uses a pair of differential signals where one signal is the logical inverse of the other, allowing multiple data bits to be encoded and transmitted through a reduced number of physical connections between stacked memory chips and the interface chip.
3Productivity
If high-speed data transfer is implemented between stacked memory chips, then productivity is improved, but signal integrity and stability deteriorate
Solution Approach 1:
The patent replaces traditional single-ended signaling with differential signaling, substituting a mechanical/electrical system that is sensitive to noise and interference with a system that inherently rejects such disturbances. The differential signaling mechanism uses the voltage difference between two complementary signals to represent data, making it immune to common-mode noise and interference that plagues high-speed single-ended transfers.
Solution Approach 2:
The differential signal pair acts as an intermediary that mediates between the memory chips and interface chip, providing a robust transmission channel that maintains signal integrity at high speeds. The complementary nature of the differential signals creates a self-correcting mechanism where noise and interference are naturally rejected, enabling high-speed data transfer without sacrificing signal stability.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip outputs a first signal by a first bus width and includes a first via which transfers the first signal. The second semiconductor chip receives, by the first bus width, the first signal transferred through the first via.