Semiconductor Diode Floating Layer Reverse Breakdown Voltage

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Solution Overview

Problem

Conventional semiconductor devices face challenges in improving reverse breakdown voltage while maintaining suppression of deterioration in forward current-voltage characteristics and forward breakdown current, and reducing element area.

Innovation Solution

A semiconductor device with a PN junction diode structure that includes a high-concentration impurity region and a floating layer of opposite conductivity type, formed using specific ion implantation processes to enhance reverse breakdown voltage without affecting forward current-voltage characteristics or increasing element area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional PN junction diode structure is used, then the element area can be kept small, but the reverse breakdown voltage cannot be improved while maintaining forward current-voltage characteristics

Engineering Contradiction:
Improvereverse breakdown voltageVSAvoidelement area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention introduces a floating layer at a different depth dimension below the high-concentration impurity region, transitioning from a two-dimensional surface structure to a three-dimensional vertical structure. This allows the reverse breakdown voltage to be enhanced through the added depth dimension without increasing the planar element area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention creates localized regions with different impurity concentrations and conductivity types - a high-concentration impurity region adjacent to an element isolation region, and a floating layer of opposite conductivity type below it. This local differentiation of electrical properties enables improved reverse breakdown characteristics without affecting the overall element area.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the element area is reduced for miniaturization, then integration density increases, but the reverse breakdown voltage deteriorates

Engineering Contradiction:
Improveelement areaVSAvoidreverse breakdown voltage
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By utilizing the vertical dimension through the floating layer positioned below the high-concentration impurity region, the invention compensates for the reduced planar area. The reverse breakdown voltage is enhanced through the vertical structure rather than expanding the horizontal element area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention changes the electrical parameters by introducing a floating layer with opposite conductivity type and specific impurity concentration. This parameter modification enables the reverse breakdown voltage to be improved while maintaining the reduced element area required for miniaturization.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the reverse breakdown voltage is improved by increasing element area, then reliability increases, but forward current-voltage characteristics deteriorate

Engineering Contradiction:
Improvereverse breakdown voltageVSAvoidforward current-voltage characteristics
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention creates a localized high-concentration impurity region adjacent to the element isolation region, which specifically enhances reverse breakdown voltage. The floating layer of opposite conductivity type is positioned below this region. This localized structural differentiation allows reverse breakdown improvement without adversely affecting the forward current-voltage characteristics of the diode.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The diode structure is segmented into distinct functional regions: a high-concentration impurity region for reverse breakdown enhancement, an element isolation region, and a floating layer below. This segmentation allows each region to be optimized for its specific function, improving reverse breakdown voltage while maintaining forward current-voltage characteristics.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively improves reverse breakdown voltage by up to 24.5% while maintaining equivalent forward breakdown current and suppressing element area growth, resulting in a highly reliable semiconductor device.

Implementation Method 1

a process of forming the floating layer by performing a second impurity implantation and at least one impurity implantation of a first impurity implantation and a third impurity implantation among the first impurity implantation in which impurities of the second conductivity type are ion-implanted once or a plurality of times

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS11177252B2Semiconductor device and method of fabricating the same
Publication Date: 2021.11.16 LAPIS SEMICON CO LTD
  • US11177252B2 patent drawing
  • US11177252B2 patent drawing
  • US11177252B2 patent drawing

AI summary

The semiconductor device and the method of fabricating the same includes, on a surface of a semiconductor substrate 1 of a first conductivity type which is P-type or N-type, a diode element using a PN junction including a high-concentration first conductivity type impurity region 6 of the first conductivity type, a high-concentration second conductivity type impurity region 5 of a second conductivity type that is a conductivity type opposite to the first conductivity type, and an element isolation region 2 sandwiched between the high-concentration first conductivity type impurity region and the high-concentration second conductivity type impurity region, and a floating layer 3 of the second conductivity type separated from the high-concentration second conductivity type impurity region below the high-concentration second conductivity type impurity region on the semiconductor substrate.