Semiconductor Contact Structure With Double Plug for Low-Resistance Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices face challenges in achieving structural stability and low electrical resistance while navigating the complexities of photo and etching processes, particularly as devices scale down, which affects manufacturing costs and reliability.
Innovation Solution
The semiconductor device incorporates a contact structure with a double pillar design, featuring a lower plug and an upper plug stacked in two stacks, where the upper surface of the lower plug is coplanar with the upper electrode, and the lower surface of the upper plug is in contact with the upper surface of the lower plug, enhancing structural stability and reducing electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional contact structure is used, then the photo and etching processes are complex, but the structural stability and electrical resistance are insufficient
Solution Approach 1:
The contact structure is divided into multiple distinct layers including a lower plug, upper plug, and cap structure with different width profiles. Each layer serves specific functions: the lower plug provides foundational electrical connection, the upper plug establishes contact with the electrode, and the cap structure provides planarization. This segmentation allows each component to be optimized independently while simplifying the overall manufacturing process through standardized deposition and etching steps.
2Ease of manufacture
If the contact structure is simplified, then the photo and etching processes become easier, but the electrical resistance increases
Solution Approach 1:
The contact structure employs local quality variations through its multi-layer design with different width profiles. The lower plug has a first width optimized for electrical connection to the substrate, the upper plug has a second width optimized for contact with the electrode, and the cap structure provides a third width for planarization. Each region's dimensions are locally optimized to achieve low electrical resistance while maintaining ease of manufacture through conventional processing techniques.
3Reliability
If the contact structure uses uniform width, then the manufacturing is simpler, but the structural stability and electrical properties deteriorate
Solution Approach 1:
The contact structure deliberately employs asymmetric width profiles across its different layers. The lower plug, upper plug, and cap structure each have different widths (first width, second width, and third width respectively), creating an asymmetric geometry that optimizes electrical properties at each level. This asymmetric design enhances structural stability and electrical performance while remaining compatible with standard manufacturing processes.
Data Source
AI summary
A semiconductor device includes a substrate; lower electrodes on the substrate; a dielectric layer on the lower electrodes; an upper electrode on the dielectric layer; a contact structure connected to the upper electrode; and a wiring layer on the contact structure, wherein the contact structure includes a lower plug, and an upper plug on the lower plug, an upper surface of the lower plug is substantially coplanar with an upper surface of the upper electrode, a first width of the upper surface of the lower plug is narrower than a second width of a lower surface of the upper plug, and the lower surface of the upper plug is in contact with the upper surface of the lower plug.