Semiconductor Device With Drain Buffer And Well Region
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Solution Overview
Problem
Conventional semiconductor devices experience a reduction in withstand voltage due to local electric field concentration between the drain and source regions, caused by sharply bent equipotential lines near the surface of the semiconductor layer.
Innovation Solution
Incorporating a drain buffer region and an n-type well region with a lead-out portion that extends beyond the periphery of the drain metal, along with field plates in an electrically floating state, to distribute and suppress electric field disturbances, thereby reducing local electric field concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If drain metal is disposed on the drain region to supply electric power, then the drain region can be electrically connected, but equipotential lines sharply bend toward the drain region causing local electric field concentration
Solution Approach 1:
An n-type well region is introduced as an intermediary structure between the drain region and the drift region. This well region with its lead-out portion extending beyond the drain metal periphery acts as a mediator to redistribute the electric field, preventing the sharp bending of equipotential lines and the resulting local electric field concentration that would otherwise occur at the drain region edge.
Solution Approach 2:
The well region extends in the lateral dimension beyond the periphery of the drain metal, creating a three-dimensional electric field distribution that prevents concentration in the vertical dimension. By adding this lateral extension, the electric field is distributed across multiple spatial dimensions, avoiding the sharp concentration that would occur in a two-dimensional configuration.
2Stability of the object's composition
If equipotential lines are distributed uniformly from drain to source, then electric field strength becomes uniform, but drain metal configuration causes equipotential lines to bend sharply near the surface
Solution Approach 1:
The n-type well region with lead-out portion serves as an intermediary that modifies the shape of equipotential lines. By extending beyond the drain metal periphery, it creates a gradual transition in equipotential line curvature, preventing sharp bending and maintaining a more uniform electric field distribution across the drift region.
3Reliability
If drain metal overlaps the well region in plan view, then electrical connection is maintained, but electric field concentration occurs at the periphery
Solution Approach 1:
The well region is segmented into a facing portion (under the drain region) and a lead-out portion (extending beyond the drain metal). This segmentation allows the electrical connection to be maintained through the facing portion while the lead-out portion extends laterally to distribute the electric field and prevent concentration at the periphery.
Solution Approach 2:
Different portions of the well region are given different functions: the facing portion provides electrical connection and field shielding, while the lead-out portion specifically addresses the peripheral electric field concentration problem by extending beyond the drain metal periphery to redistribute the field locally.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively improves the withstand voltage of the semiconductor device by preventing equipotential line bending towards the drain region, thus enhancing the device's electrical stability and reliability.
Implementation Method 1
the periphery of the lead-out portion of the well region extends to an outside of a periphery of the drain metal in a plan view... suppress an occurrence of a local electric field concentration between a drain region and a source region
Implementation Method 2
prevent equipotential line bending towards the drain region... improve the withstand voltage of the semiconductor device
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate with a first conductivity type; a semiconductor layer with a second conductivity type formed on the semiconductor substrate; a drain region with the second conductivity type and a source region with the second conductivity type formed to be spaced apart from each other in a surface region of the semiconductor layer; a drain buffer region with the second conductivity type formed in the semiconductor substrate directly under the drain region and in the semiconductor layer; a conductivity type well region with the second conductivity type formed on the semiconductor layer between the drain region and the drain buffer region; and a drain metal formed on the drain region to be electrically connected to the drain region and to overlap the well region in a plan view.


