Dual-Layer Insulating Film for Semiconductor Package Solder Wetness

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving high electrical reliability due to insufficient pressure during the reflow process, leading to defects such as non-wet solder contacts and shorts between adjacent solders, especially when using non-conductive films for stacking semiconductor chips with through-electrodes.

Innovation Solution

The use of a dual-layer insulating film structure, comprising a first insulating layer and a second insulating layer with different materials and thicknesses, is implemented to enhance solder wetness and contact reliability between semiconductor chips, with the second insulating layer acting as a flux to prevent the first insulating layer from flowing into the connection bump region during the reflow process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single-layer non-conductive film is used for stacking semiconductor chips, then the manufacturing process is simple, but electrical reliability deteriorates due to insufficient solder wetness and potential shorts

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidelectrical reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The single non-conductive film is segmented into two distinct layers: a first non-conductive film layer providing insulation and mechanical support, and a second non-conductive film layer (flux layer) providing solder wetting enhancement. This segmentation allows each layer to specialize in its function, improving overall electrical reliability while maintaining manufacturing simplicity through sequential lamination of two standard film types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a composite structure of two different non-conductive film layers with complementary properties. The first layer provides structural integrity and insulation, while the second flux layer provides solderability. This composite approach combines the benefits of both film types to achieve reliable solder joints without complicating the manufacturing process.

Inventive Principle:
Principle #40Composite materials

2Reliability

If pressure is applied during reflow process, then contact between connection bumps and pads is improved, but the non-conductive film may flow into the connection bump region causing defects

Engineering Contradiction:
Improvecontact reliabilityVSAvoidfilm flow into connection region
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The non-conductive film is segmented into two layers with the second flux layer positioned between the first non-conductive film and the connection bump. During reflow, this flux layer can flow toward the connection bump to enhance solder wetness, while the first non-conductive film layer acts as a barrier to prevent excessive film material from entering the connection region and causing shorts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second non-conductive film layer (flux layer) serves as an intermediary between the first non-conductive film and the connection bump. It mediates the interaction by providing controlled flow to enhance soldering while being consumed in the process, preventing the first non-conductive film from directly contacting and potentially shorting the connection bump.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If the non-conductive film is positioned closer to the semiconductor chip, then structural support is improved, but solder wetness deteriorates due to insufficient flux action

Engineering Contradiction:
Improvestructural supportVSAvoidsolder wetness
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The non-conductive film structure is segmented into two layers with distinct positioning and functions. The first non-conductive film layer is positioned closer to the semiconductor chip to provide structural support and insulation, while the second flux layer is positioned between the first film and the connection bump to provide solder wetting enhancement, ensuring both structural integrity and reliable solder joints.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the non-conductive film structure are assigned different qualities: the first non-conductive film layer near the chip provides structural quality, while the second flux layer near the connection bump provides chemical reactivity quality for solder wetting. This local differentiation of film properties ensures optimal performance in each critical region.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the electrical reliability and structural integrity of the semiconductor package by ensuring proper contact between connection bumps and upper connection pads, reducing defects like non-wet solder and shorts, even under varying pressure conditions.

Implementation Method 1

the second insulating layer acting as a flux to prevent the first insulating layer from flowing into the connection bump region during the reflow process

Methodology Applied
Scientific EffectFlux:

Data Source

PatentUS11676923B2Semiconductor packages
Publication Date: 2023.06.13 SAMSUNG ELECTRONICS CO LTD
  • US11676923B2 patent drawing
  • US11676923B2 patent drawing
  • US11676923B2 patent drawing

AI summary

Semiconductor packages may include a first semiconductor chip including a first through-electrode and a first upper connection pad and on an upper surface of the first semiconductor chip, a second semiconductor chip on the first semiconductor chip and including a second lower connection pad on a lower surface of the second semiconductor chip, a connection bump between the first and second semiconductor chips and connected to the first upper connection pad and the second lower connection pad, a first insulating layer between the first and second semiconductor chips and surrounding the first upper connection pad, the connection bump, and the second lower connection pad, and a second insulating layer between the first semiconductor chip and the first insulating layer and extending on the upper surface of the first semiconductor chip, a side surface of the first upper connection pad, and a portion of a side surface of the connection bump.