Semiconductor Package With Dual-Pitch Substrates

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving high reliability and design flexibility due to limitations in pitch variation and thermal expansion coefficient differences between substrates, which can lead to cracks and constrain circuit pattern designs.

Innovation Solution

The semiconductor package design incorporates a first substrate with first upper pads and a second substrate with second upper pads, where the pitch of the second upper pads is less than that of the first upper pads, allowing for increased design freedom and reliability by using printed circuit boards for both substrates and including interconnection lines and conductive structures that are electrically isolated, thereby reducing design constraints and preventing electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single substrate with uniform pitch is used, then manufacturing is simple, but design flexibility and adaptability are limited

Engineering Contradiction:
Improvedesign flexibilityVSAvoidsubstrate structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The package substrate is divided into multiple regions with different pitches (first pitch regions and second pitch regions). The first pitch regions have a first pitch suitable for bonding wires, while the second pitch regions have a second pitch suitable for bumps. This segmentation allows the substrate to accommodate different connection technologies with different pitch requirements, thereby improving design flexibility without requiring multiple separate substrates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the package substrate are assigned different local properties (different pitches). The first pitch regions are optimized for bonding wire connections while the second pitch regions are optimized for bump connections. This local differentiation enables the substrate to serve multiple functional purposes with optimized characteristics for each function, resolving the contradiction between adaptability and complexity.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If substrates with different thermal expansion coefficients are used, then design freedom increases, but cracks may occur due to thermal stress

Engineering Contradiction:
Improvedesign freedomVSAvoidcrack resistance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent modifies the physical parameters of the package substrate by incorporating through-substrate vias that extend through the entire thickness of the substrate. These vias are filled with conductive material and provide mechanical reinforcement that compensates for the thermal stress generated by differential thermal expansion between layers. This parameter change (adding through-substrate vias) allows the use of substrates with different thermal expansion coefficients while preventing crack formation.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If pitch variation is increased for different connection types, then design constraints are reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveconnection type flexibilityVSAvoidpitch accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The substrate is segmented into distinct first pitch regions and second pitch regions with clearly defined boundaries. Each region is optimized for a specific connection type (bonding wires or bumps) with appropriate pitch characteristics. This segmentation approach allows manufacturers to use different manufacturing processes for different regions, thereby managing precision requirements effectively while achieving the benefits of pitch variation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10361170B2Semiconductor package
Publication Date: 2019.07.23 SAMSUNG ELECTRONICS CO LTD
  • US10361170B2 patent drawing
  • US10361170B2 patent drawing
  • US10361170B2 patent drawing

AI summary

A semiconductor package including a first substrate including first upper pads, the first upper pads on a top surface of the first substrate, a second substrate including second upper pads, the second upper pads on a top surface of the second substrate, a pitch of the second upper pads being less than a pitch of the first upper pads, and a first semiconductor chip on and electrically connected to both (i) at least one of the first upper pads and (ii) at least one of the second upper pads may be provided.