Semiconductor Dummy Buffer Stack for Peripheral Contact Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing semiconductor device manufacturing processes are complex and inefficient, particularly in forming three-dimensional memory cell arrays, where minimizing device size and simplifying the manufacturing process are challenges due to the need for precise stacking and isolation of various layers and structures.

Innovation Solution

The semiconductor device incorporates a dummy buffer stack structure with alternately stacked dummy interlayer and sacrificial insulating layers, first dummy conductive rings, and peripheral contact holes and plugs, which simplify the manufacturing process by allowing for the overlap of peripheral circuits with memory cell arrays and reducing resistance in contact plugs through the use of dummy conductive rings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If three-dimensional memory cell arrays are implemented to minimize device size, then device area is reduced, but manufacturing process complexity increases

Engineering Contradiction:
Improvedevice areaVSAvoidmanufacturing process complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The dummy buffer stack structure is formed in advance during the same manufacturing processes as the memory cell array, including alternating stacking of dummy interlayer insulating layers and dummy sacrificial insulating layers, and forming dummy conductive rings. This preliminary action allows peripheral contact holes to be exposed simply by removing the dummy sacrificial insulating layer, eliminating the need for separate complex manufacturing steps for peripheral circuit integration.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If peripheral circuits are integrated with memory cell arrays, then device size is minimized, but manufacturing process complexity increases

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing process complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The dummy buffer stack structure merges the functions of buffer regions and peripheral contact hole formation into a single integrated structure. By forming dummy conductive rings within the dummy buffer stack during the same manufacturing processes as the memory cell array, the patent combines what would traditionally be separate manufacturing operations into one unified process flow.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If dummy buffer stack structure with dummy conductive rings is used, then resistance in contact plugs is reduced, but device structure complexity increases

Engineering Contradiction:
Improvecontact plug resistanceVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy buffer stack structure serves multiple functions simultaneously: it provides buffer regions for peripheral circuits, forms templates for peripheral contact holes through selective removal of dummy sacrificial insulating layers, and creates dummy conductive rings that reduce contact resistance. This multi-functionality reduces overall device complexity despite the apparent structural complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Manufacturing precision

If precise stacking and isolation of layers is performed, then manufacturing precision is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improvelayer stacking precisionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The dummy sacrificial insulating layer automatically serves as an etch stop layer during the removal process. When the dummy sacrificial insulating layer is removed to expose peripheral contact holes, the alternating stack structure of dummy interlayer insulating layers and dummy sacrificial insulating layers self-regulates the etching depth, eliminating the need for separate precision control mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9985048B2Semiconductor device and manufacturing method thereof
Publication Date: 2018.05.29 MIMIRIP LLC
  • US9985048B2 patent drawing
  • US9985048B2 patent drawing
  • US9985048B2 patent drawing

AI summary

A semiconductor device includes a first structure, a dummy buffer stack structure, a peripheral contact hole, and a peripheral contact plug. The first structure may include a substrate and a peripheral circuit disposed on the substrate. The dummy buffer stack structure may be disposed on the first structure. The dummy buffer stack structure may include dummy interlayer insulating layers and dummy sacrificial insulating layers, which are alternately stacked, and first dummy conductive rings stacked in a line inside the respective dummy sacrificial insulating layers. The peripheral contact hole may penetrate the dummy buffer stack structure. The peripheral contact hole may be surrounded by the first dummy conductive rings. The peripheral contact plug may be disposed in the peripheral contact hole. The peripheral contact plug may extend to be connected to the peripheral circuit.