Semiconductor Device Dummy Pulse Initialization
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Solution Overview
Problem
Semiconductor devices face errors during read operations due to incorrect sensing of threshold voltage after program or erase loops, affecting operational reliability and accuracy.
Innovation Solution
A semiconductor device with memory blocks and an operation circuit that applies a dummy pulse with positive potential to local lines after program or erase loops to initialize the channel region, preventing sensing errors during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If program loop or erase loop is performed on memory cells, then data storage or erasure operation is completed, but threshold voltage sensing becomes incorrect during subsequent read operation
Solution Approach 1:
The patent applies a dummy pulse to the local lines after program/erase loops and before read operations to initialize the channel region. This preliminary action prepares the channel for accurate threshold voltage sensing by clearing any residual charges from the previous program/erase operation, thereby preventing sensing errors without affecting the completed program/erase functionality
2Measurement precision
If dummy pulse is applied to local lines after program/erase loop, then channel region is initialized and sensing accuracy is improved, but additional operation time is required
Solution Approach 1:
The dummy pulse is applied continuously to all local lines in the memory array after program/erase loops and before read operations. This ensures that the channel region is properly initialized across the entire array, maintaining sensing accuracy while the timing is integrated into the existing operation sequence to minimize overall time loss
Data Source
AI summary
A semiconductor device includes memory blocks including a plurality of memory cells, wherein the plurality of memory cells are divided into a plurality of pages, and an operation circuit suitable for outputting operating voltages to local lines of the memory blocks to perform a program loop, an erase loop and a read operation on the plurality of memory cells, wherein the operation circuit is suitable for applying a dummy pulse having a positive potential to the local lines after the program loop or the erase loop is completed.