Semiconductor Layout With Dummy Region for CMP Erosion Control
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Solution Overview
Problem
The scale-down of MOS-FETs in semiconductor devices leads to operational deterioration due to failures like dishing and erosion during chemical mechanical polishing (CMP), which reduce interconnection line cross-sections and increase electrical resistance.
Innovation Solution
Incorporating a dummy region between cell regions with varying conductive pattern densities, where the pattern density gradually changes, and the substrate top surface is inclined, to prevent edge-of-erosion phenomena.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If MOS-FETs are scaled down to reduce pattern size and design rule, then device integration density is improved, but operational properties deteriorate due to CMP failures like dishing and erosion
Solution Approach 1:
The patent applies local quality by creating a dummy region with gradually changing pattern density between cell regions of different densities. This gradual transition prevents abrupt density changes that cause edge-of-erosion phenomena during CMP, thereby maintaining operational properties while allowing MOS-FET scale-down.
Solution Approach 2:
The dummy region is designed in advance before the CMP process to prevent dishing and erosion failures. By pre-establishing a gradual pattern density transition zone, the patent proactively mitigates CMP-related operational deterioration before it occurs.
2Adaptability or versatility
If cell regions with different pattern densities are adjacent to each other, then device functionality is achieved, but CMP failures like dishing and erosion occur at the boundaries
Solution Approach 1:
The dummy region acts as an intermediary zone between cell regions with different pattern densities. It provides a gradual transition of pattern density that mediates the abrupt change between high and low density regions, preventing dishing and erosion at the boundaries while maintaining the functional integrity of adjacent cell regions.
Solution Approach 2:
The patent changes the pattern density parameter gradually across the dummy region rather than maintaining abrupt transitions. This gradual parameter change from high to low density prevents CMP failures by eliminating sharp density boundaries that cause dishing and erosion.
3Loss of substance
If dishing or erosion occurs during CMP, then film cross section is reduced, but electrical resistance of interconnection lines increases
Solution Approach 1:
The dummy region with gradual pattern density change provides preliminary anti-action against dishing and erosion during CMP. By preventing these failures before they occur, the patent maintains film cross-section integrity and prevents the subsequent increase in electrical resistance of interconnection lines.
Data Source
AI summary
A semiconductor device may include a substrate including a first cell region, a second cell region, and a dummy region between the first and second cell regions, and conductive patterns included in the first cell region, the second cell region, and the dummy region. A first pattern density, which is defined as a density of the conductive patterns of the first cell region, may be different from a second pattern density, which is defined as a density of the conductive patterns of the second cell region. A third pattern density, which is defined as a density of the conductive patterns of the dummy region, gradually changes in a region between the first cell region and the second cell region. A top surface of the substrate may be inclined at an angle, in the dummy region.


