Wide Bandgap Semiconductor Edge Field Relaxation
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Solution Overview
Problem
Wide bandgap semiconductor materials, such as silicon carbide, require a high dielectric breakdown strength sealing material due to increased electric field strength, but existing sealing techniques, like using silicone gel, often result in insufficient electric field relaxation at the semiconductor chip's edge, leading to potential dielectric breakdown and increased manufacturing costs due to large electric field relaxation portions.
Innovation Solution
A semiconductor device with a high electric field-resistant sealing member having a dielectric breakdown field strength greater than silicone gel, applied in a specific pattern to cover the termination portion and adjacent areas, ensuring sufficient film thickness for effective electric field relaxation without increasing the size of the electric field relaxation portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large electric field relaxation portion is formed to ensure sufficient electric field relaxation at the edge, then electric field strength is relaxed, but manufacturing cost increases due to reduced semiconductor element forming area
Solution Approach 1:
The patent applies different materials with different dielectric breakdown strengths to different regions of the semiconductor device. Specifically, a first sealing material with high dielectric breakdown strength is used in the edge region where electric field relaxation is needed, while a second sealing material with lower dielectric breakdown strength can be used in other regions. This local differentiation allows sufficient electric field relaxation at the edge without requiring a large relaxation portion, thereby maintaining manufacturing cost efficiency.
2Manufacturing precision
If pinpoint accuracy dropping technique is used to form insulation member, then insulation member can be precisely positioned, but film thickness becomes small at outer end portion due to tapered shape
Solution Approach 1:
The patent changes the material parameter (dielectric breakdown strength) of the sealing material used in the edge region. By selecting a material with significantly higher dielectric breakdown strength, the system can compensate for the reduced film thickness at the outer end portion caused by the tapered shape from pinpoint accuracy dropping. This parameter change allows the insulation member to maintain sufficient reliability even with non-uniform film thickness.
3Adaptability or versatility
If wide bandgap semiconductor material is used to enhance electric field strength, then design flexibility increases, but dielectric breakdown field strength of sealing material must be increased
Solution Approach 1:
The patent applies a sealing material with high dielectric breakdown strength specifically to the edge region of the semiconductor device where the insulation member has reduced film thickness. This localized application addresses the increased sealing requirement only where needed, rather than requiring the entire sealing structure to use high-performance materials, thereby maintaining ease of manufacture while supporting the use of wide bandgap semiconductor materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively relaxes electric field strength at the semiconductor chip's edge, enhancing reliability and reducing manufacturing costs by minimizing the size of the electric field relaxation portion, while preventing dielectric breakdown of the silicone gel.
Implementation Method 1
a sealing member formed on the insulation member and having dielectric breakdown field strength smaller than that of the insulation member
Data Source
AI summary
In a semiconductor device using a wide bandgap semiconductor material having a bandgap larger than that of silicon, reliability of the semiconductor device is improved by achieving a structure in which electric field strength in the vicinity of an outer end portion of a semiconductor chip is relaxed. A side surface of the semiconductor chip CHP1a is formed of a region R1 including a first corner, a region R2 including a second corner, and a region R3 interposed between the region R1 and the region R2. At this point, in a case of defining a minimum film thickness of a high electric field-resistant sealing member MR in the region R3 as t1 and defining a maximum film thickness of the high electric field-resistant sealing member MR in the region R1 as t2, a relation of t2≤1.5×t1 is satisfied.