Semiconductor Edge Seal Structure for TSV Moisture and Crack Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices face reliability issues due to cracks and moisture propagation during dicing or singulation, which can lead to corrosion and compromised electrical connections at the bond pad, particularly where edge seals are incomplete or absent.

Innovation Solution

The implementation of a semiconductor device with a trench forming an edge seal around the through-silicon-via (TSV) and bond pad, filled with nitride material and encapsulant, which also includes a light block layer and tungsten grid to enhance reliability and prevent moisture ingress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a trench is formed entirely through the first semiconductor die and into the second semiconductor die to form an edge seal, then reliability is improved by preventing cracks and moisture propagation, but device complexity increases due to the additional structural layers and materials

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The edge seal is segmented into multiple functional layers: a trench structure filled with nitride material, an encapsulant layer, and a light block layer. Each layer serves a specific protective function, collectively preventing cracks and moisture propagation while maintaining electrical isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The edge seal employs composite material construction with nitride material filling the trench, encapsulant coating the sidewalls, and light block material providing optical isolation. This multi-material approach enhances overall reliability by addressing multiple failure modes simultaneously.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the trench is filled with nitride material and encapsulant to prevent moisture ingress, then reliability is improved, but manufacturing precision requirements increase due to the need for precise trench formation and material deposition

Engineering Contradiction:
ImprovereliabilityVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The trench is formed through both semiconductor dies before filling with nitride material and encapsulant. This preliminary structural preparation ensures proper alignment and positioning, reducing the precision requirements for subsequent material deposition steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The nitride material serves as an intermediary substance filling the trench, providing a barrier that prevents moisture propagation. The encapsulant then coats the trench sidewalls, creating a secondary protective layer that further enhances moisture resistance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a light block layer and tungsten grid are added to the edge seal structure, then reliability is improved by preventing light interference and enhancing structural integrity, but device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The edge seal structure is designed to perform multiple functions simultaneously: the light block layer prevents light interference with adjacent pixels, the tungsten grid provides structural reinforcement, and the nitride-encapsulant combination maintains electrical isolation and moisture protection. This multi-functional design enhances reliability without requiring separate structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20230361139A1Edge seals for semiconductor devices
Publication Date: 2023.11.09 SEMICON COMPONENTS IND LLC
  • US20230361139A1 patent drawing
  • US20230361139A1 patent drawing
  • US20230361139A1 patent drawing

AI summary

Implementations of a semiconductor device may include a first semiconductor die hybrid bonded to a second semiconductor die; a bond pad included in the second semiconductor die; a through-silicon-via (TSV) extending entirely through the first semiconductor die and to the bond pad included in the second semiconductor die; and a trench formed entirely through the first semiconductor die and to the bond pad included in the second semiconductor die. The trench may form an edge seal.