Semiconductor Efuse Structure With Easier Breakdown Path

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Solution Overview

Problem

The existing electric fuse (efuse) technology faces difficulty in blowing out, which hinders its effectiveness in replacing defective circuits and implementing programmed functions in integrated circuits.

Innovation Solution

A semiconductor structure comprising a substrate, a gate oxide layer, a gate stack layer, a spacer, a dielectric layer, and a contact structure is designed, where the contact structure is positioned adjacent to the gate stack layer, and the dielectric layer's thickness is reduced, altering the breakdown path to facilitate easier breakdown and improve signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional electric fuse structure is used, then the structure is simple, but the breakdown difficulty is high

Engineering Contradiction:
Improvebreakdown difficultyVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electric fuse structure is segmented into multiple functional layers: gate oxide layer, gate stack layer, spacer, dielectric layer, and contact structure. Each layer serves a specific function in the breakdown process, allowing controlled reduction of breakdown difficulty while maintaining overall structural organization and managing complexity through functional segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the structure have different properties optimized for their specific functions: the gate oxide layer provides insulation, the gate stack layer enables controlled breakdown, the spacer provides mechanical support and spacing, the dielectric layer facilitates electron injection, and the contact structure provides electrical connection. This local optimization allows the structure to achieve easier breakdown in critical regions while maintaining overall structural integrity.

Inventive Principle:
Principle #3Local quality

2Reliability

If the breakdown path is lengthened, then the insulation is improved, but the signal loss increases

Engineering Contradiction:
Improveinsulation performanceVSAvoidsignal loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The thickness of the dielectric layer is precisely controlled to be less than the spacer thickness, creating an optimal balance between insulation and signal transmission. This parameter optimization allows the structure to maintain adequate insulation while minimizing the breakdown path length and reducing signal loss during electrical signal transmission.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the breakdown difficulty of the semiconductor structure, enhances signal transmission, and improves the sensitivity of the semiconductor structure by changing the breakdown path from the gate stack layer to the dielectric layer and contact structure, thereby minimizing signal loss.

Implementation Method 1

altering the breakdown path to the gate stack layer—the dielectric layer—the contact structure, thereby reducing breakdown difficulty

Methodology Applied
Scientific EffectElectrical breakdown: Avalanche Breakdown

Data Source

PatentUS20230328971A1Semiconductor structure and fabrication method thereof
Publication Date: 2023.10.12 CHANGXIN MEMORY TECH INC
  • US20230328971A1 patent drawing
  • US20230328971A1 patent drawing
  • US20230328971A1 patent drawing

AI summary

Embodiments relate to the field of semiconductors, and provide a semiconductor structure and a fabricating method thereof. The semiconductor structure includes: a substrate (100), and a gate oxide layer (110) on a surface of the substrate (100); a gate stack layer (120) positioned on a surface of the gate oxide layer (110); a spacer(130) at least covering a first sidewall of the gate stack layer (120); a contact structure (140) at least positioned on the surface of the substrate (100); and a dielectric layer (150) at least positioned between the contact structure (140) and a second sidewall of the gate stack layer (120). The first sidewall and the second sidewall are arranged opposite to each other, and a thickness of the dielectric layer (150) is less than a thickness of the spacer(130). A breakdown difficulty of a fuse structure may be reduced at least.